logo of nvidia

英伟达Senior ASIC Verification Engineer - Networking Chip Design

社招全职地点:上海状态:招聘

任职要求


• Electrical Engineering B.Sc. or Computer Engineering B.Sc. graduate with high scores or equivalent experience.
• 5+ years of experience in DV relevant work…
登录查看完整任职要求
微信扫码,1秒登录

工作职责


• Work in a combined design and verification team specializing in Switch Fullchip works
• Understand the Switch architecture and build on testplan accordingly
• Maintain and optimize Fullchip verification enviornment to meet feature requirements efficiently
• Develop Fullchip test suites, maintain regressions, debug failures and sign-off coverages
包括英文材料
相关职位

logo of nvidia
社招

• Work in a combined design and verification team specializing in Switch Fullchip works • Understand the Switch architecture and build on testplan accordingly • Maintain and optimize Fullchip verification enviornment to meet feature requirements efficiently • Develop Fullchip test suites, maintain regressions, debug failures and sign-off coverages

更新于 2025-10-23上海
logo of nvidia
社招

• Work in a combined design and verification team specializing in Switch Fullchip works • Understand the Switch architecture and build on testplan accordingly • Maintain and optimize Fullchip verification enviornment to meet feature requirements efficiently • Develop Fullchip test suites, maintain regressions, debug failures and sign-off coverages

更新于 2025-11-28上海
logo of nvidia
社招

• Work in a combined design and verification team specializing in Switch Fullchip works • Understand the Switch architecture and build on testplan accordingly • Maintain and optimize Fullchip verification enviornment to meet feature requirements efficiently • Develop Fullchip test suites, maintain regressions, debug failures and sign-off coverages

更新于 2026-02-01上海
logo of nvidia
社招

NVIDIA SOC System-ASIC team is hiring a verification engineer. In this role, you will work closely with Arch, design and verification engineers to thoroughly verify some top-level related control units (like: Fuse/Floorsweep, Strap, Reset, Sysctrl) and some silicon measurement related units from unit-level to fullchip-level. Those units are important IPs used in both NVIDIA GPU and Tegra products. What you’ll be doing: • Micro-architecture definition for System-level modules (Fuse, Strap, Floorsweep, In-silicon measurement, Reset, Sysctrl, etc...) • Unit-level and System-level verification for System-level modules. • Own some NVIDIA internal checks to guarantee the design quality.

更新于 2025-10-29上海