英伟达Senior ASIC Floorplan Design Engineer
任职要求
• Masters Degree in Electrical Engineering, Computer Science, or Computer Engineering or equivalent experience. • At least 3+ years of relevant work experience. • A deep hardware engineering background with a concentration in VLSI and/or Computer Architecture. • Experience in Verilog, System Verilog or similar HVL. • Experience with CAD and physical design methodologies (flow and tool developm…
工作职责
• Working with architects, design leads, physical design leads and package leads, you will develop and to craft and optimize floorplans during early chip development. • Drive the area review process and collaborate with the ASIC design team to identify area, interconnect and floorplan improvement opportunities. • Solve timing and routing congestion issues with physical and ASIC design teams by influencing early design and physical implementation decisions. • You will build tools and improve existing infrastructure to optimize chip area and speed of execution.
• As a key MMPLEX Video Design team member, you will document, implement, and deliver fully verified, high-performance, low-area, and power-efficient designs to achieve the design targets and specifications. • Participate in video-related design and analyze architectural trade-offs based on features, performance requirements, and system limitations. • Craft micro-architecture, implement in HLS/RTL, and deliver a fully verified, synthesis/timing clean design. • Collaborate and coordinate with architects, other designers, pre- and post-silicon verification, SOCD, emulation, back-end, and bringup teams to accomplish your tasks.
• Co-work with the architect to define module architecture/micro-architecture. • Building for NVIDIA next next-generation IPs • Involved in the entire ASIC flow.
• Work with CPU architects, to define architecture/micro architecture for next generation of in-house RISC-V CPU • Explore solutions to improve performance, power efficiency • To build the design, make sure it meets all requirements, and deliver to CPU to users
• Understand the Switch architecture and data flows • Work in a combined design and verification team specializing in Switch Fullchip works, like assembly, integrations plus a series of QAs to ensure quality • Refine the full Chip working flow to improve the entire team's efficiency • Work closely with multiple teams within organizations such as Architecture, Micro- Architecture, and FW to deliver the FC model for project milestones.