英伟达ASIC Physical Design Engineer - New College Grad 2026

At NVIDIA, we pride ourselves in having energy efficient products. We believe that continuing to maintain our products' energy efficiency compared to the competition is key to our continued success. Our team is responsible for researching, developing, and deploying methodologies to help NVIDIA's products become more energy efficient; and is responsible for building energy models that integrate into architectural simulators, RTL simulation, and emulation platforms. Key responsibilities include developing techniques to model, analyze, and reduce the power consumption of NVIDIA GPUs. As a member of the Power Modeling, Methodology, and Analysis Team, you will collaborate with Architects, Performance Engineers, Software Engineers, ASIC Design Engineers, and Physical Design teams to study and implement energy modeling techniques for NVIDIA's next-generation GPUs and Tegra SOCs. Your contributions will help us gain early insight into the energy consumption of graphics and artificial intelligence workloads, and will allow us to influence architectural, design, and power management improvements.  What you’ll be doing: • Work with architects and performance architects to develop an energy-efficient GPU. • Develop methodologies and workflows to select and run a wide variety of workloads to train models using ML and/or statistical techniques. • Develop methodologies to improve the accuracy of energy models under various constraints, such as, process, timing, floorplan and layout. • Correlate the predicted energy from models created at different stages of the design cycle, with the goal of bridging early estimates to silicon. • Develop tools to debug energy inefficiencies observed in various workloads run on silicon, RTL and architectural simulators. Work with architects to fix the identified energy inefficiencies. • Work with performance, verification and emulation methodology and infrastructure development teams to integrate energy models into their platforms. • Prototype new architectural features, create an energy model, and analyze the system impact.

At NVIDIA, we pride ourselves in having energy efficient products. We believe that continuing to maintain our products' energy efficiency compared to the competition is key to our continued success. Our team is responsible for researching, developing, and deploying methodologies to help NVIDIA's products become more energy efficient; and is responsible for building energy models that integrate into architectural simulators, RTL simulation, and emulation platforms. Key responsibilities include developing techniques to model, analyze, and reduce the power consumption of NVIDIA GPUs. As a member of the Power Modeling, Methodology, and Analysis Team, you will collaborate with Architects, Performance Engineers, Software Engineers, ASIC Design Engineers, and Physical Design teams to study and implement energy modeling techniques for NVIDIA's next-generation GPUs and Tegra SOCs. Your contributions will help us gain early insight into the energy consumption of graphics and artificial intelligence workloads, and will allow us to influence architectural, design, and power management improvements.  What you’ll be doing: • Work with architects and performance architects to develop an energy-efficient GPU. • Develop methodologies and workflows to select and run a wide variety of workloads to train models using ML and/or statistical techniques. • Develop methodologies to improve the accuracy of energy models under various constraints, such as, process, timing, floorplan and layout. • Correlate the predicted energy from models created at different stages of the design cycle, with the goal of bridging early estimates to silicon. • Develop tools to debug energy inefficiencies observed in various workloads run on silicon, RTL and architectural simulators. Work with architects to fix the identified energy inefficiencies. • Work with performance, verification and emulation methodology and infrastructure development teams to integrate energy models into their platforms. • Prototype new architectural features, create an energy model, and analyze the system impact.

The NVIDIA GPU clocks group is looking for an excellent Senior ASIC Design Engineer to join the team. The Team is responsible for crafting all aspects of GPU clocking. We collaborate with the frontend design team to understand the clocking requirements for the chip, and work with backend teams to understand the physical restrictions. The GPU clocks group architects, designs and validates the clocks RTL. The complexity of clocks RTL has increased many fold to support our features that power our product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. What you’ll be doing: As a Clocks team member, you will collaborate with other architects, ASIC designers and verification engineers to design high frequency and low power clocks. You should be able to engage with multiple teams and design the GPU clocks to satisfy all the architectural constraints. You will need to run and enhance some in-house flow to guarantee the good quality of clocks RTL and netlist, drive the issues to close. Together with other team members, we deliver clock information to SOC verification team, timing and DFT teams. You will use Perl/Python to improve the productivity of the above teams. Collaborate with software and silicon solution team to debug GPU clock silicon bugs in our new products.

At NVIDIA, we pride ourselves in having energy efficient products. We believe that continuing to maintain our products' energy efficiency compared to the competition is key to our continued success. Our team is responsible for researching, developing, and deploying methodologies to help NVIDIA's products become more energy efficient; and is responsible for building energy models that integrate into architectural simulators, RTL simulation, and emulation platforms. Key responsibilities include developing techniques to model, analyze, and reduce the power consumption of NVIDIA GPUs. As a member of the Power Modeling, Methodology, and Analysis Team, you will collaborate with Architects, Performance Engineers, Software Engineers, ASIC Design Engineers, and Physical Design teams to study and implement energy modeling techniques for NVIDIA's next-generation GPUs and Tegra SOCs. Your contributions will help us gain early insight into the energy consumption of graphics and artificial intelligence workloads, and will allow us to influence architectural, design, and power management improvements.  What you’ll be doing: • Work with architects and performance architects to develop an energy-efficient GPU. • Develop methodologies and workflows to select and run a wide variety of workloads to train models using ML and/or statistical techniques. • Develop methodologies to improve the accuracy of energy models under various constraints, such as, process, timing, floorplan and layout. • Correlate the predicted energy from models created at different stages of the design cycle, with the goal of bridging early estimates to silicon. • Develop tools to debug energy inefficiencies observed in various workloads run on silicon, RTL and architectural simulators. Work with architects to fix the identified energy inefficiencies. • Work with performance, verification and emulation methodology and infrastructure development teams to integrate energy models into their platforms. • Prototype new architectural features, create an energy model, and analyze the system impact.