AMDSOC DFT DV Engineer
任职要求
Familiar with Linux Environment (including shell scripting and linux gnu tools) Experience with design for verification (assertion based design strategies, code coverage, functional coverage, test plan, gate-level simulation, back-annotation etc.) Should be versatile in any one of the high level verification flow …
工作职责
THE ROLE: The focus of this role is to plan, build, and execute the verification of new and existing features for AMD’s graphics processor IP, resulting in no bugs in the final design. THE PERSON: You have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/timezones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems. KEY RESPONSIBILITIES: Develop/Maintain tests for functional verification and performance verification at the SOC level Build testbench components to support the next generation products Maintain or improve current test libraries to support SOC level testing Maintain and improve current hardware simulation environment to speed up the runtime performance and improve the debug facility Verify block/chip level DFX design and features. Develop high coverage and cost effective test patterns. Provide support on Post silicon bring up Provide technical support to other teams
THE ROLE: The S3 DFT team fully own AMD S3BU (Strategic Silicon Solution Business Unit) SOC DFT definition, Implementation, verification till final silicon bring up. We design the APUs mainly for consoles. Design Verification team is part of the whole chip design team and responsible to make sure the RTL quality. You will be working with DFT design and front-end team to verify the debug logic and make sure it is working on post-Si. THE PERSON: Has related knowledge for design verification and good debug skills. Familiar with entire ASIC design flow Has good communication skills and be able to work both independently and in a team. Should have strong problem-solving skills KEY RESPONSIBILITIES: Qualified candidate will perform some or all functions below: Develop test plan according to the specification and review with Architect and Designer. Develop test scenarios to verify the design and analyze the coverage. Complete the verification task before TO. Participate in ATE bring-up and debug the DFT patterns on ATE.
THE ROLE: The S3 DFT team fully own AMD S3BU (Strategic Silicon Solution Business Unit) SOC DFT definition, Implementation, verification till final silicon bring up. We design the APUs mainly for consoles. Design Verification team is part of the whole chip design team and responsible to make sure the RTL quality. You will be working with DFT design and front-end team to verify the debug logic and make sure it is working on post-Si.
1、主导SOC芯片的定义，主导和参与产品关键场景的设计、实现和验证，负责技术体系的搭建； 2、主导SOC软件的需求分析、架构设计和方案分析，输出需求规格，子系统架构、系统分析文档，参与技术评审与决策； 3、洞察行业内软硬件技术驱动，研究软硬件前沿技术，输出领域技术规划，推动软硬件协同设计； 4、主导某一领域的技术发展，包括性能领域、功耗领域、安全领域、低功耗智能领域、DFX领域、套片软件，软件架构、软件工程等领域。
1、负责内存芯片（System Cache、SMMU、DDR）及存储器模块的架构设计、优化和性能提升； 2、负责内存管理以及子系统优化，负责多媒体领域内存管理（包含性能优化、内存容量管理等）和性能优化； 3、负责文件系统、老化等系统分析、设计和优化，提升系统性能； 4、洞察行业内存存储技术，研究软硬件前沿技术，输出领域技术规划，推动软硬件协同设计。