AMDSystems Design Eng.
任职要求
The person needs to be well self-motivated for deliveries and innovation, strong technical background on DDR interface, also with good communication skills. KEY RESPONSIBILITIES: Provides DDR technical leadership in the development of new test & validation features Closely interacts with silicon design (DRAM controller and memory Phy) in test execution & debug, as well as in feature definition for future product generation Writes comprehensive electrical & functional test plans for the memory validation of processors Executes electrical & functional test plans for AMD processors using hardware & software validation tools, oscilloscopes, & logic analyzers. Debug of electrical & functional issues of the memory sub-system…
工作职责
THE ROLE: Processor silicon DDR interface feature enable, electrical test and debug engineer. In this role, this senior level engineer will be part of a highly technical team that develops test plans, executes bring-up & feature enable, & debugs electrical issues in the memory sub-system of new processors.
Work closely with ODM/OEM partners to enable successful deployment of AMD server platforms by augmenting customer solutions with technical collateral, such as application note documentation, user guide on customization and tuning, sample and reference design materials, and debugging/profiling tools · Perform platform reviews (design, block-level, schematic, and layout review), bringing up, as well as debugging on internal and external reference and production designs, and provide solutions to customers · Provide customers technical training to improve overall customer design skill · Engage directly on key technical topics, issues, architecture discussions, and performance optimizations with customers and internal teams and steer of multi-party discussion to convergence · Analytic ability to address technical issues and generate creative solutions · On-site support to speed up issue closure to meet overall project schedule Job
Work closely with ODM/OEM partners to enable successful deployment of AMD server platforms by augmenting customer solutions with technical collateral, such as application note documentation, user guide on customization and tuning, sample and reference design materials, and debugging/profiling tools · Perform platform reviews (design, block-level, schematic, and layout review), bringing up, as well as debugging on internal and external reference and production designs, and provide solutions to customers · Provide customers technical training to improve overall customer design skill · Engage directly on key technical topics, issues, architecture discussions, and performance optimizations with customers and internal teams and steer of multi-party discussion to convergence · Analytic ability to address technical issues and generate creative solutions · On-site support to speed up issue closure to meet overall project schedule Job
• Ship features with PM & Engineering. Co‑own scenario goals; translate product requirements into scientific plans and productionized solutions that meet quality/latency/cost targets. • Model development & optimization. Design, fine‑tune, and evaluate models for LLM‑based authoring, summarization, reasoning, voice/chat, and personalization (e.g., SFT, alignment, prompt/tool use, safety filtering, multilingual & multimodal). • Data & evaluation at scale. Build/extend data pipelines for curation/labeling/feature stores; author offline eval harnesses; run online A/Bs and interleavings; define guardrails and success metrics; author scorecards and decision memos. • Production ML engineering. contribute to service code and configs; add monitoring, tracing, dashboards, and auto‑scaling; participate in on‑call and postmortems to improve live‑site reliability. • Responsible AI. Produce review artifacts, document mitigations for safety/privacy/fairness, support red‑teaming and sensitive‑use checks, and align with Microsoft’s Responsible AI Standard. • Collaboration & mentoring. Partner across PM/ENG/Design/CE/ORA/CELA; share methods and code, review PRs, improve reproducibility and documentation; mentor junior scientists.
• Ship features with PM & Engineering. Co‑own scenario goals; translate product requirements into scientific plans and productionized solutions that meet quality/latency/cost targets. • Model development & optimization. Design, fine‑tune, and evaluate models for LLM‑based authoring, summarization, reasoning, voice/chat, and personalization (e.g., SFT, alignment, prompt/tool use, safety filtering, multilingual & multimodal). • Data & evaluation at scale. Build/extend data pipelines for curation/labeling/feature stores; author offline eval harnesses; run online A/Bs and interleavings; define guardrails and success metrics; author scorecards and decision memos. • Production ML engineering. contribute to service code and configs; add monitoring, tracing, dashboards, and auto‑scaling; participate in on‑call and postmortems to improve live‑site reliability. • Responsible AI. Produce review artifacts, document mitigations for safety/privacy/fairness, support red‑teaming and sensitive‑use checks, and align with Microsoft’s Responsible AI Standard. • Collaboration & mentoring. Partner across PM/ENG/Design/CE/ORA/CELA; share methods and code, review PRs, improve reproducibility and documentation; mentor junior scientists.