AMDDFT Engineer

任职要求

Benefits offered are described:  AMD benefits at a glance.
 
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工作职责

THE ROLE:
The GE S3 DFT team fully own AMD S3BU (Strategic Silicon Solution Business Unit) SOC DFT definition, Implementation, verification till final silicon bring up. You will directly work on cutting edge DFT technology and address the challenge of AMD leading SOC suffering.  Also, you will participants all the development, discussion around world, including NA, India, and China. 
 
THE PERSON:
Hands on working experience on ASIC DFT design and verificationFamiliar with entire ASIC design flowExperience with microprocessor design a big plusShould have strong problem-solving skills 
KEY RESPONSIBILITIES:
Qualified candidate will perform some or all functions below:
Participate in SOC full Chip DFT feature and architecture definitionResponsible for DFT specification generation and reviewImplement SOC DFT function including SCAN, Boundary SCAN, MBIST, Analog Macro test logic.Perform verification on all DFT structuresGenerate DFT related timing constraints and work with PD team for timing closureGenerate and verify DFT structural patterns and functional patternsParticipate in ATE bring-up and debug the DFT patterns on ATEDesign and implement other DFX (debug, characterization, yield etc) logics 
PREFERRED EXPERIENCE:
Good English hearing, speaking, reading, and writing capabilitiesGood communication skills 
ACADEMIC CREDENTIALS:
BS in EE & CS.  MS preferred, with 3+ years’ experience 
LOCATION:
Shanghai, Beijing
 
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