地平线【2027届校招】数字芯片设计工程师-成都
校招全职芯片序列地点：成都状态：招聘
工作描述
任职要求
1.微电子、集成电路、计算机，通信等相关专业；
2.熟练掌握Verilog和芯片开发流程，具备数字电路设计的基本技能；
3.具备计算机体系结构/ARM架构/总线协议/高速互联/Cache及一致性/DDR等领域经验者优先；
4.工作上积极主动，敢于挑战，能耐得寂寞长期稳定发展，有良好的团队合…登录查看完整工作描述
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包括英文材料
缓存+
https://hackernoon.com/the-system-design-cheat-sheet-cache
The cache is a layer that stores a subset of data, typically the most frequently accessed or essential information, in a location quicker to access than its primary storage location.
https://www.youtube.com/watch?v=bP4BeUjNkXc
Caching strategies, Distributed Caching, Eviction Policies, Write-Through Cache and Least Recently Used (LRU) cache are all important terms when it comes to designing an efficient system with a caching layer.
https://www.youtube.com/watch?v=dGAgxozNWFE
SOC+
https://www.arm.com/resources/education/books/modern-soc
The aim of this textbook is to expose aspiring and practising SoC designers to the fundamentals and latest developments in SoC design and technologies using examples of Arm Cortex-A technology and related IP blocks and interfaces.
https://www.arm.com/resources/education/education-kits/introduction-to-soc
To produce students with solid introductory knowledge on the basics of SoC design and key practical skills required to implement a simple SoC on an FPGA and write embedded programs targeted at the microprocessor to control the peripherals.
https://www.youtube.com/watch?v=dokgLSAhqHI
A key part of the digital innovation revolution has been the embrace of the SoC, or system-on-chip.
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1.微电子、集成电路、计算机，通信等相关专业； 2.熟练掌握Verilog和芯片开发流程，具备数字电路设计的基本技能； 3.具备计算机体系结构/ARM架构/总线协议/高速互联/Cache及一致性/DD
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