英伟达Senior Design Verification Engineer

工作描述

任职要求
• BS / MS in electrical / computer engineering or equivalent experience.
• 3+ years (MS) or 5+ years (BS) working experience.
• Familiar with advanced verification methodology, tools and flow
• Fully experienced verification flow, including testplan, test, coverage model, testbench, and BFM modeling.
• Deep understanding of Verilog and HVL (High-level Verification Language)
 
Ways to stand out from the crowd:
• Strong programming skills in Perl and C/C++is plus
• Having good architectural or design experience is a big plus.
• At least good at one of the scripting programming languages: Perl, Shell, Ruby, Python.
 With competitive salaries and a generous benefits package, we are widely considered to be one of the technology world’s most desirable employers. We have some of the most f…