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英伟达Senior Custom SOC IP Verification Engineer

社招全职地点:上海 | 北京状态:招聘

任职要求


• Clear understanding of complexities involved with various design verification tools, including Synopsys VCS or Cadence Xcelium Simulator, Verdi, JasperGold or VC Formal
• Track record of first-pass success in ASIC Development
• B.S. or M.S. degree in Computer Engineering or Electrical Engineering
• Experience working across multiple projects and adjusting priorities in partnership with stakeholders
• 5+ years of experience owning processing ASIC, IP or SoC design verification
• Experience managing and delivering complex mixed language UVM and C++ testbenches
• Ability to int…
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工作职责


• Responsible for ASIC design verification for various IPs at IP and SOC levels
• Responsible for reference model development and integration 
• Participate in IP/SOC architecture, micro-architecture reviews, interface with Architecture, SW/FW, Design, and Modeling to work out comprehensive first-time right verification plans
• Contribute to the innovative verification methodology development, functional and code coverage closure.
• Work on the complex TB creation, direct/random tests and drive the function and coverage to closure.
• Contribute to the development of silicon and platform verification strategy and methodology
• Triage the fail on SOC level with SOCV/EMU/SW team
• Collaborate with IP development teams, and participate in, and support soft and hard IP identification, selection, and IP licensing
包括英文材料
Cadence+
SOC+
C+
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