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英伟达GPU Power Analysis Engineer

社招全职地点:上海状态:招聘

任职要求


• MS with 1-3 years of experience or PhD in related fields.
• Basic understanding of concepts of energy consumption, estimation, and low power design.
• Familiarity with Verilog and ASIC design principles, including knowledge of logic cells.
• Good verbal/written English and interpersonal skills; much collaboration with design teams is expected.
• Strong coding skills, preferably in Python, C++.
• Ability to formulate and analyze algorithms, and comment on…
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工作职责


• Use internally developed tools and industry standard pre-silicon gate-level and RTL power analysis tools, to help improve product power efficiency.
• Develop and share best practices for performing pre-silicon power analysis, Enhance internal power tools and automate best practices
• Perform comparative power analysis, to spot trends and anomalies, that warrant more scrutiny.
• Interact with architects and RTL designers to help them interpret their power data and identify power bugs; drive them to implement fixes.
• Select and run a wide variety of workloads for power analysis, Collaborate with performance and architecture teams to validate performance of the workloads
• Prototype a new architectural feature in Verilog and analyze power.
包括英文材料
Python+
C+
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• Use internally developed tools and industry standard pre-silicon gate-level and RTL power analysis tools, to help improve product power efficiency. • Develop and share best practices for performing pre-silicon power analysis, Enhance internal power tools and automate best practices • Perform comparative power analysis, to spot trends and anomalies, that warrant more scrutiny. • Interact with architects and RTL designers to help them interpret their power data and identify power bugs; drive them to implement fixes. • Select and run a wide variety of workloads for power analysis, Collaborate with performance and architecture teams to validate performance of the workloads • Prototype a new architectural feature in Verilog and analyze power.

更新于 2026-01-20上海
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• Use internally developed tools and industry standard pre-silicon gate-level and RTL power analysis tools, to help improve product power efficiency. • Develop and share best practices for performing pre-silicon power analysis, Enhance internal power tools and automate best practices • Perform comparative power analysis, to spot trends and anomalies, that warrant more scrutiny. • Interact with architects and RTL designers to help them interpret their power data and identify power bugs; drive them to implement fixes. • Select and run a wide variety of workloads for power analysis, Collaborate with performance and architecture teams to validate performance of the workloads • Prototype a new architectural feature in Verilog and analyze power.

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实习

• Use internally developed tools and industry standard pre-silicon gate-level and RTL power analysis tools, to help improve product power efficiency. • Develop and share best practices for performing pre-silicon power analysis, Enhance internal power tools and automate best practices • Perform comparative power analysis, to spot trends and anomalies, that warrant more scrutiny. • Interact with architects and RTL designers to help them interpret their power data and identify power bugs; drive them to implement fixes. • Select and run a wide variety of workloads for power analysis, Collaborate with performance and architecture teams to validate performance of the workloads • Prototype a new architectural feature in Verilog and analyze power.

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社招1-3年后端开发

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更新于 2026-06-17上海|北京|杭州