AMDATE Engineer
任职要求
8-10 years’ industrial experience with >5 years test development experience Experience in digital product testing, good understanding of test method and IP, Scan/Bist/Func/HSIO/Fuse experience is preferred Advantest V93K, T2000, J750 popular …
工作职责
THE ROLE: ATE test program owner which owns wafer sort or final test insertion, developing and optimizing ATE test program for new coverage enhancement, test time reduction, new test method implementation, supporting production bring up, sustaining, issue debugging and continuous improvement for product indices. Working with regional teams extensively including product manager, project management, product engineering, DV, NPI, platform, software infrastructure team and hardware team on the test solutions optimization. THE PERSON: As the role of Test Engineer, we expect you could be self-motivation, creative thinking, and good communication skill in English KEY RESPONSIBILITIES: CPU test program owner in Asia, develop and release ATE test program production Early involvement in pre-silicon and silicon out phase including test coverage evaluation, pattern review, test flow development, test hardware design, charz and program release Develop engineering program to support various product engineering activities Post-production product new OPN enablement to support business needs Identify test time reduction opportunities and execute TTR for cost reduction Test program yield improvement via test debugging or test flow optimization Test issue debugging and solution providing with global cross functional team Other duties as assigned by supervisor
-根据芯片设计需求，与DFT紧密合作，制订芯片ATE测试方案，保证芯片测试覆盖率 -负责CP/FT测试程序开发、调试及相关测试向量的准备工作，按项目要求输出相关测试文档和报告 -根据芯片产品开发需求，制定并执行芯片ATE测试计划 -负责ATE测试硬件的设计和准备工作(含Load Board，probe card，socket，Changekit等) -NPI阶段负责开发CHAR/DVS/HTOL等工程验证程序，支持芯片验证工作 -量产阶段负责测试数据跟踪分析，优化测试方案、提高覆盖率、优化测试时间、降低测试成本（Cost down），解决量产过程中的测试稳定性问题，为良率持续改善与失效分析提供技术支持 -根据项目需求，负责测试产能建设，验证和管理量产测试Tooling，达到产能建设目标 -团队协作，遵守流程规范，保证项目进度和质量 -与FT测试工程师一起与研发设计团队对接，完成分Bin冗余测试，并在量产后实现分Bin测试
-负责制定SOC/ASIC芯片的DFT设计方案和测试方案 -负责DFT电路的实现和验证，优化DFT设计流程，包括MBIST、SCAN、Boundary Scan以及其它可测试性电路设计 -pattern生成和仿真，优化测试覆盖率 -协助团队完成整个芯片的sign-off -与ATE测试团队配合快速解决调试过程中的问题，协助完成测试failure的分析和良率提升，顺利实现芯片量产测试
1.负责内存内存颗粒技术选型，设计DRAM颗粒测试方案和颗粒准入标准； 2.负责内存测试方案的设计、开发和优化，确保内存产品的质量和性能； 3.负责介质级失效分析，开发定制化测试pattern，协助解决内存设计和生产中的质量问题； 4.制定和改进内存测试标准和流程，提高测试效率和质量； 5.跟踪最新的内存测试技术和工具，持续提升测试团队的技术水平。
1、负责SoC芯片中的DFT相关工作，包括Scan，MBIST，ATPG，Boundary Scan等等； 2、和其他团队合作，完成芯片设计过程中相关的Timing/Power-IR分析和收敛； 3、流片后进行ATE测试，包括向量调试，覆盖率优化，解决测试中遇到的各种问题。