AMDAI编译/高性能计算C++实习生 (Jan - Jun 2026)
任职要求
You are in your Master's degree in Computer Science, Software Engineering, or a related field. You have strong programming skills in Python and C++. You have experience in compilers, parallel computing, or GPU programming. You are familiar …
工作职责
An exciting internship opportunity to make an immediate contribution to AMD's next generation of technology innovations awaits you! We have a multifaceted, high-energy work environment filled with a diverse group of employees, and we provide outstanding opportunities for developing your career. During your internship, our programs provide the opportunity to collaborate with AMD leaders, receive one-on-one mentorship, attend amazing networking events, and much more. Being part of AMD means receiving hands-on experience that will give you a competitive edge. Together We Advance your career! JOB DETAILS: Location: Beijing,China Onsite/Hybrid: at least 3 days a week, either in a hybrid or onsite or remote work structure throughout the duration of the co-op/intern term. Duration: at least 6 months WHAT YOU WILL BE DOING: We are seeking highly motivated AI Compiler Software Engineering intern/co-op to join our team. In this role – We will involve you in extending Triton’s compiler infrastructure to support new AI workloads and hardware targets. We will assign you tasks to implement and optimize GPU kernels using Triton’s Python-based DSL. We will train you to analyze kernel performance using profiling tools and help you identify bottlenecks and optimization opportunities. We will understand how modern compilers translate high-level abstractions into efficient machine code.
负责AI编译器研发，通过理解云上AI负载特征，挖掘CPU/GPU硬件与编译框架的协同优化潜力；主导核心功能实现与性能优化，解决AI训练、推理场景中的关键工程挑战，提升计算效率；同时紧密协同跨团队资源，推动AI编译器产品的业务落地与技术价值转化。 职责描述： 1. 理解云上AI负载场景与特点，挖掘CPU/GPU硬件架构与编译器，编程框架协同优化的潜力， 负责核心功能的实现与性能优化。 2. 能够与各团队紧密合作，理解和实现客户需求，参与AI编译器产品的设计、功能开发及业务落地工作。
1.基于自研芯片，研发高性能图和算子编译器，解决芯片落地过程中编译相关性能、易用性等问题； 2.探索和研发自动生成算子解决方案，提升生成算子效率； 3.不断迭代编译器功能、性能和易用性，和业务一起构建AI生态。
岗位职责： 1.负责设计、开发和维护DSA架构下的NPU编译器工具链，确保其高效稳定运行。 2.扩展和优化深度学习框架（包括TensorFlow、PyTorch、ONNX等）的支持能力，提升AI模型兼容性。 3.负责计算图优化，包括各种网络的常见通用优化以及针对硬件平台的优化。 4.优化编译器工具链中的各种算法，以提高编译质量和执行效率。 5.与芯片设计团队及软件开发团队紧密合作，进行系统层面的编译器性能调优。 6.对开源编译器框架TVM/LLVM(MLIR)进行二次开发，以满足自驾业务需求。
1、参与面向大模型与物理AI场景的AI编译器研发，优化计算图表示、算子融合与内存调度策略； 2、针对自研AI芯片进行算子定制与性能调优，实现端到端推理与训练加速； 3、设计并实现自动代码生成工具链，支持多后端（GPU/NPU/CPU）的高效算子发射； 4、调研SOTA大语言模型的压缩和加速算法，并针对小鹏的模型结构做优化和实现； 5、与算法、芯片团队深度协作，推动编译优化在百万级量产环境中的稳定落地。