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AMDSilicon Design Engineer

社招全职 Engineering地点:上海状态:停招♡ 收藏

工作描述


任职要求
Proven understanding of RTL design, synthesis, and ECO principles Excellent knowledge with FE design tools such as Design/Fusion Compiler, Prime Time, Power Artist, PtPx, etc. Proficient with Verilog, C/C++ and other scripting languages (e.g. Tcl, Ruby, Perl, Python and Makefile) Excellent skills with Unix/Linux environment Familiar with RTL coding techniques for competitive PPA-measured QoR Familiar with RTL coding style for clean check on design rules (LINT, CDC, etc.) Good understanding of gate level circuit design and physical level design concept and methodology Familiar with VCS/Verdi Excellent communication skills in English (both written and oral) Self motivated, and committed to achievement ACADEMIC CREDENTIALS:  Bachelors or Masters degree in computer engineering/Electrical Engineering #LI-EH1

工作职责
THE ROLE: A Front-End Silicon Design and Integration (FEINT) Engineering role in our GFX…
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包括英文材料
C+
C+++
Ruby+
Perl+
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