AMDPost-Silicon System Debug Engineer

• Based on understanding a product feature, determine the best manufacturing stage for testing GPU/CPU hardware features. This could be ATE, socketed or board-level system test, rack-level test, or pod/cluster-level test, as needed. • Create new tests or test conditions based on an understanding of hardware features or learnings from customer returns or gaps in internal manufacturing stages. • Perform or automate test runs, analyze and visualize data to ensure a high-quality test, and guide debug for yield or escape issues. • Partner with test engineering and operations teams to implementing efficient manufacturable test solutions

THE ROLE: AMD Graphics Platform validation team is part of Graphics systems and customer engineering, and is responsible for validating platforms for AMD client products and graphic Products. You will be working with cross function teams globally to validate client and graphics platforms, triage/debug issues, and drive validation’s deliverables to hit platform validation milestones. THE PERSON: Bachelor +, Minimum of 6+ year hands-on industry experience in PC, laptop , Graphics , mother boards, server product test and issue debug. Excellent communication skills including English ability in oral and written Be able to work both independently and in a team. Leading technical discussion with multiple function teams and drive issue’s triage and debug. KEY RESPONSIBILITIES: Engaged in AMD Client and dGPU’s post-silicon phases , Driving to review internal & customer’s design, develop validation strategies and test plan for AMD reference or customer platform designs Create test procedures and generate technical documents as needed. Execute Post-Si Integration validation ; Track/Report validation status . Triage/debug system level issue with cross function engineering teams (Firmware , SW , diag , board design) , and root cause the issue Support new product bring-up and debug issues

THE ROLE: As a member within the Post-Silicon Solution Validation Development team, you will play a critical role in system/solution level feature enablement and ensuring comprehensive validation coverage by coordinating with multiple validation teams. Your expertise in system-level features and x86 architectures will be pivotal in leading efforts across various stages of silicon development, from IP firmware development and IP bring up to feature enablement and validation at both IP, SW and system levels. The Your role will not only focus on technical excellence but also leadership in driving process improvement, innovation, and cross-functional collaboration. THE PERSON: A quick learner for new technologies. Excellent communication skill (both verbal and written), including Mandarin and English. Key performance skills include decision making, problem solving, teamwork. KEY RESPONSIBILITIES: Lead APU/CPU system/solution level feature enablement for critical areas such as Modern Standby (or general power management), Managebility, and NPU, etc. Define APU/CPU system/solution level feature validation strategy, oversee and ensure comprehensive validation coverage, working closely with multiple internal and external validation teams across different stages of silicon development. Improve gen to gen validation quanlity and efficiency for system/solution features. Contribute significantly to debugging and problem resolution for solution features, facilitating a smooth and efficient development cycle. Engage horizontally across different silicon development stages, including IP firmware development, feature IP bring up, feature enablement, and IP/system level validation, SW validation. Collaborate vertically across various technical layers, from hardware to firmware, OS (& drivers), and applications, ensuring seamless integration and optimization. Take on leadership roles, such as driving process improvements, leading technical forums, and contributing to team activities. Foster innovation by contributing to research papers, patents, and other forms of intellectual property that advance our technological capabilities and industry leadership.

• Proactively dive into new feature and spec from Pre-Si and lead test strategies development, including functional validation methodology, characterization and tuning strategy, platform/component interoperability, test design, debug capability and tools/scripts, system, SLT, and manufacturing test requirement. • Develop bring-up, validation, tuning, and productization plans. • Build supporting tools/script/infrastructure with relevant stakeholder teams. • Continuously optimize validation and productization processes and methodologies to improve overall quality and efficiency. • Proactively drive and identify opportunities and methods for test strategies and validation methodology optimization, efficiency improvement and innovation based on project learnings and challenging.