施耐德Electronics System Architect - Analog Electronics

Change the world. Love your job. As a Digital IC Design Engineering intern, you'll architect new TI products and make our customers' visions a reality. You'll define, design, model, implement and document analog, digital, and RF integrated circuits (ICs). And, you'll have the opportunity to work in exciting areas like audio, imaging, high-speed, interface, clocking, medical, high volume linear, automotive, storage, power supply, battery management, linear power and many more. Some of your responsibilities will include, but will not be limited to: • Partnering with business teams and system engineering to develop mutually agreeable design specifications • Providing high-level analysis on chip architecture trade-offs to ensure spec compliance and superior performance at a competitive cost • Participating in design reviews and creating the necessary design and product documentation • Partnering on IC layouts to ensure a high-performance standard • Characterizing prototypes, developing test specifications and coordinating with test/product engineering to drive product releases • Driving behavioral models Put your talent to work with us as a Digital IC Design Engineer Intern! Texas Instruments will not sponsor job applicants for visas or work authorization for this position.

China CTO Office Electronics System Architect Mission The Electronics Centre of Excellence is driving the electronics transformation across the Energy Management business unit in China. In this context, we are seeking a candidate to work in the China CTO office and support 5 divisions in the Energy Management BU. This high-profile, technical role requires an Electronics system architect (with a focus on semiconductors and electronics ecosystems) who can: · Understand the local electronic market trends and build the right relationship with local suppliers/ecosystem partners. Understand the solutions and moves of our competitors. Question and optimize existing electronics architectures while demonstrating leadership. Collaborate with local manufacturers on component-level discussions for both Power Electronics and Processing (MCU/MPU) or Analogue Electronics domains. · Build the right technological actions plan and partnership with start-ups and universities Responsibilities & Skills As part of the global Electronics Centre of Excellence, you will be in charge of one technology (3 roles are opened: one on Power Electronics, one on Embedded Processing, one Analogue Electronics) focusing on China for China and you will ensure alignment with division needs. Key additions: Architecture Leadership: Lead cross-functional teams to challenge and refine existing electronics architectures, balancing innovation with practicality. Mentor junior engineers from divisions or stakeholders on architectural best practices. Component Collaboration: Power Electronics Expert/Architect: Engage directly with local manufacturers to evaluate component performance, cost, and sustainability. Processor (MCU/MPU) Expert/Architect: Collaborate with suppliers to optimize hardware/software integration and address technical constraints. Global CoE and Local CoE team’s Collaboration: Define/update the strategy to deploy the technology you will be responsible for: Structure techno action plans/path for innovation on this technology locally Work with the Technology Standardization Management team and purchasing team to have an up-to-the-mark standard Drive a platforming approach for your domain to optimize solutions across the board

China CTO Office Electronics System Architect Mission The Electronics Centre of Excellence is driving the electronics transformation across the Energy Management business unit in China. In this context, we are seeking a candidate to work in the China CTO office and support 5 divisions in the Energy Management BU. This high-profile, technical role requires an Electronics system architect (with a focus on semiconductors and electronics ecosystems) who can: · Understand the local electronic market trends and build the right relationship with local suppliers/ecosystem partners. Understand the solutions and moves of our competitors. Question and optimize existing electronics architectures while demonstrating leadership. Collaborate with local manufacturers on component-level discussions for both Power Electronics and Processing (MCU/MPU) or Analogue Electronics domains. · Build the right technological actions plan and partnership with start-ups and universities Responsibilities & Skills As part of the global Electronics Centre of Excellence, you will be in charge of one technology (3 roles are opened: one on Power Electronics, one on Embedded Processing, one Analogue Electronics) focusing on China for China and you will ensure alignment with division needs. Key additions: Architecture Leadership: Lead cross-functional teams to challenge and refine existing electronics architectures, balancing innovation with practicality. Mentor junior engineers from divisions or stakeholders on architectural best practices. Component Collaboration: Power Electronics Expert/Architect: Engage directly with local manufacturers to evaluate component performance, cost, and sustainability. Processor (MCU/MPU) Expert/Architect: Collaborate with suppliers to optimize hardware/software integration and address technical constraints. Global CoE and Local CoE team’s Collaboration: Define/update the strategy to deploy the technology you will be responsible for: Structure techno action plans/path for innovation on this technology locally Work with the Technology Standardization Management team and purchasing team to have an up-to-the-mark standard Drive a platforming approach for your domain to optimize solutions across the board

In this role, you will work with architect, hardware and software engineering groups to provide accurate performance modeling of the next-generation inter-chip network architecture for high-performance AI chip and AI network. * Identifies the challenging problems, and evaluate various architectural solutions for the next-generation of network for AI chip and AI Super Pod. * Gets strong influences on future AI products by advanced architecture and evaluates the new architecture with performance modeling using C, C++, SystemC or other high level description languages. * Provides solid and accurate modeling result and influence the direction of next generation of AI networking. * Focus in the domain of AI chip to chip interconnect subsystem, Scale-up Switch chip, C2C link, and etc. * Participation in defining the micro-architecture of key subsystem. * Works closely with design, software, system, and verification team for the final success of products.