地平线DFT Engineer

THE ROLE: The GES3 DFT team fully own AMD S3BU (Strategic Silicon Solution Business Unit) SOC DFT definition, Implementation, verification till final silicon bring up. You will directly work on cutting edge DFT technology and address the challenge of AMD leading SOC suffering. Also, you will participants all the development, discussion around world, including NA, India, and China.

THE ROLE: We are looking for an adaptive, self-motivative design verification engineer to join our growing team. As a key contributor, you will be part of a leading team to drive and improve AMD's abilities to deliver the highest quality, industry-leading technologies to market. The Verification Engineering team furthers and encourages continuous technical innovation to showcase successes as well as facilitate continuous career development.

• As a member in our team, you will be responsible for the design and implementation of state-of-the-art designs in test access mechanisms, memory BIST and scan compression. • You'll be responsible for DFT verification environment setup, own DFT verification and bringup tasks for Clocks, Boundary Scan, Analog and MBIST, Scan, etc. You'll have chance to take the lead role for DFT verifications and bringup. • In long term, you can be a DFT lead for verification or extend the expertise to DFT design or implementation.

THE ROLE: The S3 DFT team fully own AMD S3BU (Strategic Silicon Solution Business Unit) SOC DFT definition, Implementation, verification till final silicon bring up. We design the APUs mainly for consoles. Design Verification team is part of the whole chip design team and responsible to make sure the RTL quality. You will be working with DFT design and front-end team to verify the debug logic and make sure it is working on post-Si. THE PERSON: Has related knowledge for design verification and good debug skills. Familiar with entire ASIC design flow Has good communication skills and be able to work both independently and in a team. Should have strong problem-solving skills KEY RESPONSIBILITIES: Qualified candidate will perform some or all functions below: Develop test plan according to the specification and review with Architect and Designer. Develop test scenarios to verify the design and analyze the coverage. Complete the verification task before TO. Participate in ATE bring-up and debug the DFT patterns on ATE.