长鑫存储IO设计(J17333)
1.设计电路审核的流程及质量控制 2.产品电路设计过程中部门项目支持 3.使用最先进的技术设计和验证高级内存产品中使用的模拟/混合信号电路 4.设计和验证高速/功能复杂/低功耗和电源管理技术先进的存储器芯片
1.Design/verify/optimize high speed IO circuit blocks used in memory products,DDR4,DDR5,LPDDR4,LPDDR5,GDDR5,GDDR6 etc.; 2.Developing advanced(sub-10ps) SerDes—advance PHY architectures, with emphasis on high-speed receivers and signal-conditioning/equalization techniques; 3.Modeling and simulations of advance analog systems,algorithm development,as well as mixed-signal system integration,bring-up and debug; 4.Work with design team,Plan/implement/verifythew hole analog circuit system; 5.Design the circuity used for test,main focus on analog block but not limited; 6.Guide layout designer floorplan/implement the layout and response post layout simulation; 7.Provide support to Product Engineering for silicon test/debug； 8.Pre-research the advanced high speed IO technology used in the next generation of DRAM.
1.与芯片IO设计、Package设计、PCB设计等同事协作，完成电源以及高速数字接口的仿真、分析以及优化工作； 2.针对电源完整性以及信号完整性搭建仿真测试平台； 3.使用常用各种等EDA工具抽取Package、PCB的电路模型； 4.对仿真电路进行实际测试，根据实测结果，完善和优化仿真平台； 5.跟踪研究常见的各种高速总线接口，完成仿真建模，并形成PCB走线规则。
