荣耀芯片设计高级工程师
校招全职研发类地点:西安状态:招聘
工作描述
任职要求 1、微电子、集成电路、电子工程、计算机等相关专业,具备端/边侧NPU/AI加速器IP设计开发实战经验; 2、精通数字IC前端设计流程,熟练使用Chisel进行IP模块设计与RTL生成,精通Verilog/SystemVerilog,具备独立完成NPU IP从架构设计到RTL实现的全流程能力; 3、深入理解端侧NPU核心架构,精通轻量化计算阵列、DMA、Cache、AMBA总线设计,熟悉端侧AI算子硬件加速与模型硬件映射逻辑; 4、精通低功耗数字电路设计方法,熟练掌握PPA优化技巧,能独立完成IP时序优化与功耗优化;熟练使用综合、仿…
登录查看完整工作描述
微信扫码,1秒登录
包括英文材料
系统设计+
https://roadmap.sh/system-design
Everything you need to know about designing large scale systems.
https://www.youtube.com/watch?v=F2FmTdLtb_4
This complete system design tutorial covers scalability, reliability, data handling, and high-level architecture with clear explanations, real-world examples, and practical strategies.
缓存+
https://hackernoon.com/the-system-design-cheat-sheet-cache
The cache is a layer that stores a subset of data, typically the most frequently accessed or essential information, in a location quicker to access than its primary storage location.
https://www.youtube.com/watch?v=bP4BeUjNkXc
Caching strategies, Distributed Caching, Eviction Policies, Write-Through Cache and Least Recently Used (LRU) cache are all important terms when it comes to designing an efficient system with a caching layer.
https://www.youtube.com/watch?v=dGAgxozNWFE
CNN+
https://learnopencv.com/understanding-convolutional-neural-networks-cnn/
Convolutional Neural Network (CNN) forms the basis of computer vision and image processing.
[英文] CNN Explainer
https://poloclub.github.io/cnn-explainer/
Learn Convolutional Neural Network (CNN) in your browser!
https://www.deeplearningbook.org/contents/convnets.html
Convolutional networks(LeCun, 1989), also known as convolutional neuralnetworks, or CNNs, are a specialized kind of neural network for processing data.
https://www.youtube.com/watch?v=2xqkSUhmmXU
MIT Introduction to Deep Learning 6.S191: Lecture 3 Convolutional Neural Networks for Computer Vision
还有更多 •••
相关职位
社招3年以上技术-芯片
至少3年以上ASIC,并满足以下一个或多个方向 1. 熟悉芯片设计流程,并有参与流片的经验。 2. 熟悉RTL综合, Floorplan 到后端时序收敛的流程,16nm及以下优先考虑。 3. 中等复杂
更新于 2026-08-10上海

社招3年以上技术-芯片
至少3年以上ASIC,并满足以下一个或多个方向 1. 熟悉芯片设计流程,并有参与流片的经验。 2. 熟悉RTL综合, Floorplan 到后端时序收敛的流程,16nm及以下优先考虑。 3. 中等复杂
更新于 2026-04-02上海
社招4年以上芯片
工作职责: 1. 负责SOC的CPU/总线/CRG/安全/高速接口/实现/低功耗方案设计优化及交付工作,开发相关IP(以上任选其一); 2. 负责SOC中TOP/子系统的方案设计和集成交付,开发关联I
更新于 2026-06-17上海