平头哥平头哥-AI芯片互联架构师-上海
任职要求
* Minimum Bachelor degree in Computer Science or Electronics Engineering; M.S. or Ph.D. degree is preferred. * Minimum of 5 years (for M.S.) 3 years (for Ph.D.) of experience on computer architecture or network chip design. * Smart and show good potential in at least one of the following areas: 1.Server AI chip. 2.Smart NIC/RDMA/RoCE/DPU. 3.State-of-the-art Switch chip. * Han…
工作职责
In this role, you will work with hardware and software engineering groups to define the next-generation inter-chip network architecture for high-performance AI chip and AI network. * Identifies the challenging problems, and evaluate various architectural solutions for the next-generation of network for AI chip and AI Super Pod. * Gets strong influences on future AI products by advanced architecture design as the excellent interface between software and hardware. * Architecture design of AI chip to chip interconnect subsystem, Scale-up Switch chip, C2C link, and etc. * Documents the high-level architecture specification. * Participation in defining the micro-architecture of key subsystem. * Strong technical leadership to achieve successful delivery of final silicon product. * Works closely with design, software, system, and verification team.
In this role, you will work with hardware and software engineering groups to define the next-generation inter-chip network architecture for high-performance AI chip and AI network. * Identifies the challenging problems, and evaluate various architectural solutions for the next-generation of network for AI chip and AI Super Pod. * Gets strong influences on future AI products by advanced architecture design as the excellent interface between software and hardware. * Leads architecture design of AI chip to chip interconnect subsystem, Scale-up Switch chip, C2C link, and etc. * Documents the high-level architecture specification. * Participation in defining the micro-architecture of key subsystem. * Strong technical leadership to achieve successful delivery of final silicon product. * Works closely with design, software, system, and verification team.
1、参与软硬件系统架构设计； 2、设计和开发高性能的C2C（Chip-to-Chip）接口软件，包括但不限于PCIe、Ethernet、UCIe等互连技术的驱动程序和中间件； 3、与asic团队紧密合作，理解C2C互连技术的具体实现细节，如数据同步机制、时钟管理、数据流量管理、错误检测和纠正、安全性等，确保软件设计符合硬件要求； 4、开发测试用例，测试C2C接口在不同场景下的稳定性和性能表现，包括但不限于高带宽、低延迟、误码率等关键特性； 5、参与软硬协同性能调优。
-负责昆仑芯AI芯片性能深度学习高性能计算库开发，支持各种AI场景 -探索新一代AI芯片编程模型和架构 -深度学习框架Pytorch/PaddlePaddle图性能优化 -大规模分布式训练性能优化，AI芯片通信库开发，探索高效的芯片互联架构
1、参与AI芯片多卡互联方案的设计与开发，根据公司产品需求，制定高效、稳定的多卡互联架构； 2、参与开发和优化多卡互联的软件驱动程序，实现多卡之间的协同工作，提高系统的整体性能和稳定性； 3、参与多卡互联系统的验证与调试，及时发现并解决在测试过程中出现的各种问题； 4、参与AI芯片Profiling方案设计，负责Profiling模块的验证以及相关驱动和工具的开发； 5、参与AI芯片任务调度器驱动方案设计和开发，负责任务调度Firmware的开发； 6、跟踪行业最新技术动态，为公司的AI芯片多卡互联技术发展提供前瞻性的建议和技术储备。