平头哥平头哥-DFT设计/DFT CAD开发高级工程师/专家-北京
任职要求
7+ years for Bachelor or 5+ years for master degree experience in DFT design and verification, test pattern development
KEY KNOWLEDGE, SKILLS AND ABILITIES REQUIRED
- Good Knowledge of Scan/ATPG, MBIST and boundary scan and other DFT techniques
- Good Knowledge of industry DFT tools like DFTMax, TetraMax ,TestKompress, FastScan, Tessent Mbist, SMS etc
- Good knowledge of digital SoC/ASIC desig…工作职责
The candidate is expected to be responsible for following tasks: - Participate in complex Chip DFT/DFD feature and architecture definition - Implement DFT function including SCAN, Boundary SCAN, MBIST, Analog Macro test logic - Generate DFT related timing constraints and work for timing closure - Develop and verify high coverage and cost effective test patterns for the production test - Design, implement and verify other DFX (debug, characterization, yield etc) feature - Evaluate and establish the advanced DFT/DFD tools and flow as DFT CAD
The candidate is expected to be responsible for following tasks: - Participate in complex Chip DFT/DFD feature and architecture definition - Implement DFT function including SCAN, Boundary SCAN, MBIST, Analog Macro test logic - Generate DFT related timing constraints and work for timing closure - Develop and verify high coverage and cost effective test patterns for the production test - Design, implement and verify other DFX (debug, characterization, yield etc) feature - Evaluate and establish the advanced DFT/DFD tools and flow as DFT CAD
The candidate is expected to be responsible for following tasks: - Participate in complex Chip DFT/DFD feature and architecture definition - Implement DFT function including SCAN, Boundary SCAN, MBIST, Analog Macro test logic - Generate DFT related timing constraints and work for timing closure - Develop and verify high coverage and cost effective test patterns for the production test - Design, implement and verify other DFX (debug, characterization, yield etc) feature - Evaluate and establish the advanced DFT/DFD tools and flow as DFT CAD
1、使用Verilog & System Verilog编写芯片RTL代码； 2、搭建测试平台，产生测试向量验证芯片Function和Performance； 3、使用综合工具产生网表，优化时序/面积，并参与分析后端布局布线的结果； 4、使用Power分析工具优化芯片功耗； 5、开发自动化流程提高芯片设计效率。
1. 使用Verilog & System Verilog编写芯片RTL代码； 2. 搭建测试平台，产生测试向量验证芯片Function和Performance； 3. 使用综合工具产生网表，优化时序/面积，并参与分析后端布局布线的结果； 4. 使用Power分析工具优化芯片功耗； 5. 开发自动化流程提高芯片设计效率。