平头哥平头哥-芯片系统验证专家-上海/深圳
任职要求
1. 熟悉C/C++编程，Bash/Python等脚本类语言编程； 2. 熟悉BIOS/UEFI, Linux, u-Boot框架及底软驱动开发，虚拟化底层支持； 3. 熟悉EMU/FPGA平台，包括Palladium/ZEBU/HAPS等平台； 4. 熟练使用Trace32，示波器，万用表，逻辑分析仪，精密电源，自动测试仪器等设备； 5. 熟悉Windows和Linux常用操作，版本管理工具git等，Excel/Word等办公软件； 6. 熟悉SLT开发及产线环境适配； 7. 加分：熟悉嵌入式领域，服务器领域，ARM架构，RISCV架构，某些领域专家（PCIe，DDR，PHY）； 8. 加分：DevOps开发者，自动化测试开发者。
工作职责
负责以下一个或者多个领域 1. 理解DUT(SoC Level)，ENV(EMU/EVB) , 与架构师沟通，并编写可实施的测试方案与计划； 2. 根据测试方案开发并执行测试用例，发现不符合预期时，提bug并跟踪解决； 3. 开发SLT以及产线配套程序，并对失效芯片进行初步分析； 4. 使用各种仪器仪表进行波形，功耗测试，测量工作； 5. 总结测试结果，并输出测试报告； 6. 开发和维护自动化测试环境，测试配套工具。
1. 规划内存系统验证策略，制定验证计划，并完成测试点分解以及环境搭建，保证验证计划闭环； 2. 编写和调试功能用例、性能用例、功耗用例，参与内存系统前仿真、Gate-level后仿真，完成验证覆盖率收集和分析； 3. 与架构/设计/软件团队协作，确保内存系统在多个平台得到充分验证，配合上下游完成EMU、FPGA验证、底软调试及回片测试工作。
1.和架构/软件团队协同开展工作，完成芯片设计/架构相关规格的验证； 2.完成验证工程，验证脚本的开发； 3.完成模块级/子系统/系统级验证环境开发; 4.提取验证特性，撰写验证用例，负责覆盖率的收集和分析，以及质量活动开展,独立完成芯片的验证出口；
芯片产业进入后摩尔时代，芯片封装解决方案面临诸多挑战。封装的尺寸、结构、散热、BOM材料、制造工艺，共同影响芯片的性能、成本、以及应用可靠性。作为封装工程师，你将致力于业界最高端芯片封装解决方案的设计、开发、制造、测试、验证，失效分析以及技术创新。在这里，你可以了解并获得最先进的芯片封装技术知识及能力，并和业界顶尖的工程师一起，共同开发最先进封装技术，并推动其持续发展。 As IC industry enters the more than Moore era, chip packaging solutions are facing many challenges. Package size, package structure, heat dissipation, BOM material, and manufacturing process all affect chip performance, cost, and application reliability. As a packaging engineer, you will be dedicated to the design, development, manufacture, testing, verification, failure analysis, and technological innovation of the industry's highest-end chip packaging solutions. Here, you can understand and acquire the relevant knowledge and skills of the most advanced chip packaging technology, and work with the industry's top engineers to jointly develop the most advanced packaging technology and promote its continuous development. 工作职责RESPONSIBILITIES: 作为可靠性测试验证工程师，负责IC可靠性测试方案的制定与设计，保证芯片可靠性测试验证的顺利开展以支撑芯片及产品的开发及量产应用 Work as a Reliability Test and Verification Engineer, define reliability solution and its corresponding hardware design, to ensure reliability test and verification tasks to support the development and mass production of chips and products. 负责芯片及产品相关的失效分析、可靠性寿命评估，并针对失效分析结果联合上下游团队提出适当的解决方案 Responsible for failure analysis and reliability life assessment to chips and products, and work with up/down-stream teams to propose appropriate solutions based on failure analysis results 构建并不断完善可靠性测试流程、系统，支撑公司产品交付 Build and continuously improve the reliability test process and system to support the company's product delivery 从效率、成本等角度对可靠性测试方法、方案开展持续改进及优化，保证产品测试质量的基础上，不断提升可靠性测试竞争力 Continuous improvement and optimization of reliability test methods and solutions from the perspectives of efficiency and cost, and continuously improve reliability test competitiveness on the basis of ensuring product test quality. 跟踪行业技术趋势，开展可靠性寿命评估模型及方法的研究，应对新工艺制程、新结构、新材料的挑战 Track on the industry trend, perform research on reliability life assessment models and methodology, to addressing challenge on new process, new structure and new material.
芯片产业进入后摩尔时代，芯片封装解决方案面临诸多挑战。封装的尺寸、结构、散热、BOM材料、制造工艺，共同影响芯片的性能、成本、以及应用可靠性。作为封装工程师，你将致力于业界最高端芯片封装解决方案的设计、开发、制造、测试、验证，失效分析以及技术创新。在这里，你可以了解并获得最先进的芯片封装技术知识及能力，并和业界顶尖的工程师一起，共同开发最先进封装技术，并推动其持续发展。 As IC industry enters the more than Moore era, chip packaging solutions are facing many challenges. Package size, package structure, heat dissipation, BOM material, and manufacturing process all affect chip performance, cost, and application reliability. As a packaging engineer, you will be dedicated to the design, development, manufacture, testing, verification, failure analysis, and technological innovation of the industry's highest-end chip packaging solutions. Here, you can understand and acquire the relevant knowledge and skills of the most advanced chip packaging technology, and work with the industry's top engineers to jointly develop the most advanced packaging technology and promote its continuous development. 工作职责RESPONSIBILITIES: 作为可靠性测试验证工程师，负责IC可靠性测试方案的制定与设计，保证芯片可靠性测试验证的顺利开展以支撑芯片及产品的开发及量产应用 Work as a Reliability Test and Verification Engineer, define reliability solution and its corresponding hardware design, to ensure reliability test and verification tasks to support the development and mass production of chips and products. 负责芯片及产品相关的失效分析、可靠性寿命评估，并针对失效分析结果联合上下游团队提出适当的解决方案 Responsible for failure analysis and reliability life assessment to chips and products, and work with up/down-stream teams to propose appropriate solutions based on failure analysis results 构建并不断完善可靠性测试流程、系统，支撑公司产品交付 Build and continuously improve the reliability test process and system to support the company's product delivery 从效率、成本等角度对可靠性测试方法、方案开展持续改进及优化，保证产品测试质量的基础上，不断提升可靠性测试竞争力 Continuous improvement and optimization of reliability test methods and solutions from the perspectives of efficiency and cost, and continuously improve reliability test competitiveness on the basis of ensuring product test quality. 跟踪行业技术趋势，开展可靠性寿命评估模型及方法的研究，应对新工艺制程、新结构、新材料的挑战 Track on the industry trend, perform research on reliability life assessment models and methodology, to addressing challenge on new process, new structure and new material.