英伟达Senior ASIC Engineer
任职要求
• BS/MS in electrical/computer engineering and related. • At least 5+ years of meaningful ASIC work experience. • Experience in micro-architecture and RTL development focused on video or image processing, scheduling, memory sub-systems and/or network interconnects. • Solid understanding of ASIC design flow, including RTL design, verification, synthesis, timing, and power analysis. • Proven t…
工作职责
• As a key MMPLEX Video Design team member, you will document, implement, and deliver fully verified, high-performance, low-area, and power-efficient designs to achieve the design targets and specifications. • Participate in video-related design and analyze architectural trade-offs based on features, performance requirements, and system limitations. • Craft micro-architecture, implement in HLS/RTL, and deliver a fully verified, synthesis/timing clean design. • Collaborate and coordinate with architects, other designers, pre- and post-silicon verification, SOCD, emulation, back-end, and bringup teams to accomplish your tasks.
• As a key MMPLEX Video Design team member, you will document, implement, and deliver fully verified, high-performance, low-area, and power-efficient designs to achieve the design targets and specifications. • Participate in video-related design and analyze architectural trade-offs based on features, performance requirements, and system limitations. • Craft micro-architecture, implement in HLS/RTL, and deliver a fully verified, synthesis/timing clean design. • Collaborate and coordinate with architects, other designers, pre- and post-silicon verification, SOCD, emulation, back-end, and bringup teams to accomplish your tasks.
• As a key MMPLEX Video Design team member, you will document, implement, and deliver fully verified, high-performance, low-area, and power-efficient designs to achieve the design targets and specifications. • Participate in video-related design and analyze architectural trade-offs based on features, performance requirements, and system limitations. • Craft micro-architecture, implement in HLS/RTL, and deliver a fully verified, synthesis/timing clean design. • Collaborate and coordinate with architects, other designers, pre- and post-silicon verification, SOCD, emulation, back-end, and bringup teams to accomplish your tasks.
• Co-work with the architect to define module architecture/micro-architecture. • Building for NVIDIA next next-generation IPs • Involved in the entire ASIC flow.
• Understand the Switch architecture and data flows • Work in a combined design and verification team specializing in Switch Fullchip works, like assembly, integrations plus a series of QAs to ensure quality • Refine the full Chip working flow to improve the entire team's efficiency • Work closely with multiple teams within organizations such as Architecture, Micro- Architecture, and FW to deliver the FC model for project milestones.