英伟达System Software Engineer, Post-Silicon Validation Infrastructure - Tools Quality Control

• Develop end-to-end pre-silicon and post-silicon validation methodologies, processes, and workflows for system-level silicon security and safety circuit characterization, including voltage, clock, power and fault monitors/detection etc. • Drive the translation of new circuit features into clear productization requirements, dependencies, validation scope, and signoff criteria for silicon characterization test plans and productization methodologies. • Define validation strategies for analog, digital, and mixed-signal circuits, as well as new silicon features, with a strong focus on bring-up readiness and scalable execution. • Design and develop tools to automate characterization, data collection, test execution, and result analysis to improve efficiency, quality, and coverage. • Enable left-shift validation for next-generation product features by bringing up new flows, tests, and PVT solutions in pre-silicon on prior-generation platforms, in close collaboration with cross-functional teams. • Work closely with system architects, chip and board designers, software and firmware engineers, HW/SW application engineers, process and reliability specialists, ATE engineers, product managers, sales, and operations teams to resolve blockers, align validation targets, and drive milestone readiness. • Continuously explore and apply innovative approaches, including AI-driven methodologies, to solve complex design challenges and improve validation quality, efficiency, and scalability. • Contribute to technical documentation and knowledge-sharing efforts that promote best practices and broader adoption of AI-enabled methodologies.

• As a Silicon Circuit Characterization engineer for NVIDIA's family of chips and products, you will participate in silicon bringup & post-silicon characterization of new silicon to optimize performance, power, yield, and quality to define the world’s fastest products. • Build methodologies to characterize Analog, digital and Mixed Signal circuits, silicon features, correlate silicon behavior with simulations.       • Design tools to improve execution efficiency to facilitate the ability to work simultaneously on multiple products.   • Find creative solutions to complex silicon and system level problems and be on the frontline to lead show-stopper bugs, in order to enable product shipment. • Work closely with other engineering teams to determine coverage needs and constraints. • Drive design improvements for future product based on what is found in the lab.

• Design architectures & algorithms for circuit calibration feature,  characterize & model circuit behavior for both ATE and mission mode • Define circuit calibration software/firmware/tools, optimize calibration process and costs • Partner with ATE or SW team, integrate circuit calibration process into ATE or SW • Improve ATE to system correlation and circuit PVT variations

THE ROLE: As a member within the Post-Silicon Solution Validation Development team, you will play a critical role in system/solution level feature enablement and ensuring comprehensive validation coverage by coordinating with multiple validation teams. Your expertise in system-level features and x86 architectures will be pivotal in leading efforts across various stages of silicon development, from IP firmware development and IP bring up to feature enablement and validation at both IP, SW and system levels. The Your role will not only focus on technical excellence but also leadership in driving process improvement, innovation, and cross-functional collaboration. THE PERSON: A quick learner for new technologies. Excellent communication skill (both verbal and written), including Mandarin and English. Key performance skills include decision making, problem solving, teamwork. KEY RESPONSIBILITIES: Lead APU/CPU system/solution level feature enablement for critical areas such as Modern Standby (or general power management), Managebility, and NPU, etc. Define APU/CPU system/solution level feature validation strategy, oversee and ensure comprehensive validation coverage, working closely with multiple internal and external validation teams across different stages of silicon development. Improve gen to gen validation quanlity and efficiency for system/solution features. Contribute significantly to debugging and problem resolution for solution features, facilitating a smooth and efficient development cycle. Engage horizontally across different silicon development stages, including IP firmware development, feature IP bring up, feature enablement, and IP/system level validation, SW validation. Collaborate vertically across various technical layers, from hardware to firmware, OS (& drivers), and applications, ensuring seamless integration and optimization. Take on leadership roles, such as driving process improvements, leading technical forums, and contributing to team activities. Foster innovation by contributing to research papers, patents, and other forms of intellectual property that advance our technological capabilities and industry leadership.