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英伟达Physical Design, VLSI - New College Grad 2026

社招全职地点:上海 | 北京状态:招聘

任职要求


• MSEE in CS/EE/ME
• Basic knowledge of VLSI digital design backend work flow
• Basic device model, processing technology, timing, noise and power in chip design

Ways to stand out from the crowd: 
• Hands-on experiences in EDA software from Synopsys (DC/ICC2/STAR-RC/PT/ICV), Cadence (Genus/Innovus/Quantus/Tempus/PVS), ANSYS (Seahawk/Redhawk) etc is a plus
• Hands-on background in DL/ML projects/programs is a plus.
NVIDIA is commi…
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工作职责


NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 30 years. It’s a unique legacy of innovation that’s fueled by great technology—and amazing people. Today, we’re tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. We are now looking for Physical Design Engineer in Shanghai & Beijing office.
What you’ll be doing:
• Analysis on placement, routing, timing, clock, power, noise and DFM and provide optimization strategy
• Work on full chip clock distribution
• Troubleshoot a wide variety of design and flow complicated issues, and apply proactive intervention.
• Collaborate with RTL, DFT and Circuit designers to ensure high quality of design implementation.
包括英文材料
Cadence+
相关职位

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实习

• Work on flow enhancement of in-house flow on floorplan, power/clock distribution, placement, routing, timing/power/noise analysis, chip assembly, and physical verification • Work on in-house tool development and exploration • Look for AI solution to improve workflow efficiency and automation

更新于 2025-10-16上海|北京
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社招

We are now looking for a Physical Design Engineer. VLSI Physical Design Team at NVIDIA Shanghai has been built up since 2005. The team has made contribution to various successful products launched by NVIDIA Corporation over 15 years. We utilize latest process technology, advanced EDA tools, and sophisticated design methodology. We always work on the most challenging designs, and push for performance limit. What you’ll be doing: • A role in physical design for NVIDIA GPU and Mobile chips. • Participate in various aspects of physical design, including full chip floorplanning, power/clock distribution, timing optimization, place & route, timing closure, power/signal integrity analysis, and physical verification. • Troubleshoot a wide variety of design and flow complicated issues, and apply proactive intervention Collaborate with RTL, DFT and Circuit designers to ensure high quality of design implementation.

更新于 2025-11-19上海|北京
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社招

• Working with architects, design leads, physical design leads and package leads, you will develop and to craft and optimize floorplans during early chip development. • Drive the area review process and collaborate with the ASIC design team to identify area, interconnect and floorplan improvement opportunities. • Solve timing and routing congestion issues with physical and ASIC design teams by influencing early design and physical implementation decisions. • You will build tools and improve existing infrastructure to optimize chip area and speed of execution.

更新于 2025-10-29上海
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实习

• Working with architects, design leads, physical design leads and package leads, you will develop and to craft and optimize floorplans during early chip development. • Drive the area review process and collaborate with the ASIC design team to identify area, interconnect and floorplan improvement opportunities. • Solve timing and routing congestion issues with physical and ASIC design teams by influencing early design and physical implementation decisions. • You will build tools and improve existing infrastructure using AI extensively to optimize chip area and speed of execution.

更新于 2025-10-17上海