英伟达Physical Design Engineer

THE ROLE: A senior technical contributor that drives end-to-end delivery of SOC solution and coordinates implementation and optimization across multiple teams. The position will involve interfacing with SOC Architecture, CAD and customer to plan, develop and optimize SOC design and implementation. This is an exciting opportunity to work on the cutting edge of APU or ASIC design.   THE PERSON: You are a subject matter expert and strong technical contributor with SOC implementation experience. You excel as part of a team where communication and team skills are highly valued.   KEY RESPONSIBILITIES: Technical lead on challenge PPA optimization and 3DIC solutionDevelop AI methods to implement FEINT and PD work efficiency improvement    PREFERRED EXPERIENCE: Familiar with whole process of RTL-to-GDS Knowledge of advanced process nodes, like 2nm and 3nmGood knowledge for 3DIC designExperience of PPA optimization for high performance or low power designExperience advocating for technical solutions in a collaborative team environment, especially combining AI methodsExcellent communication and collaboration skills  ACADEMIC CREDENTIALS: Bachelor’s or Master’s degree in related discipline preferred  LOCATION: Zhangdong Road, Shanghai   #LI-VC1

THE ROLE: We are seeking a highly skilled Senior Silicon Design Engineer to join our dynamic GPU design team. In this pivotal role, you will collaborate with experts to drive the physical design of high-speed microprocessors utilizing advanced CMOS technologies. This is your chance to contribute to cutting-edge projects that shape the future of computing.   THE PERSON: You are an enthusiastic team player with excellent communication skills, eager to learn and tackle challenging problems in a collaborative environment. Your strong analytical mindset enables you to contribute to the development of industry-leading microprocessors, making a significant impact on our projects.   KEY RESPONSIBILITIES: Drive the design and implementation of large design blocks from initial concept through to tape-out.Execute PnR for high-speed designs while meticulously analyzing design results for optimization.Collaborate closely with cross-functional teams, including RTL/Logic designers, to facilitate seamless integration and problem resolution.PREFERRED EXPERIENCES: Understanding of Physical Design, with practical experience in Timing Closure, Circuit Design, Electrical Closure, and Physical verificationProficiency in different Physical Design CAD tools, and scripting languages (such as tcl and Python).In-depth understanding of high-speed GPU designs and architectures, along with current sub-micro technologies.Exceptional problem-solving abilities, with the capability to work independently on complex tasks while also being an effective team player.ACADEMIC CREDENTIALS: Master’s degree in Electrical Engineering, Computer Systems Engineering, or a related field.LOCATION: Shanghai   #LI-VC1

We are now looking for a Physical Design Engineer. VLSI Physical Design Team at NVIDIA Shanghai has been built up since 2005. The team has made contribution to various successful products launched by NVIDIA Corporation over 15 years. We utilize latest process technology, advanced EDA tools, and sophisticated design methodology. We always work on the most challenging designs, and push for performance limit. What you’ll be doing: • A role in physical design for NVIDIA GPU and Mobile chips. • Participate in various aspects of physical design, including full chip floorplanning, power/clock distribution, timing optimization, place & route, timing closure, power/signal integrity analysis, and physical verification. • Troubleshoot a wide variety of design and flow complicated issues, and apply proactive intervention Collaborate with RTL, DFT and Circuit designers to ensure high quality of design implementation.

THE ROLE: Work with global Front-End design team and physical design team for large scale ASIC chip physical implementation. Focus on physical design of deep sub-micron GPU chips including block level floor planning, place&route, physical verification etc.