AMD芯片可测试性设计实习生 DFT Design Intern (Jan - Jun 2026)
任职要求
The candidate is expected to exhibit good verbal and written communication skills in both Chinese and English, specialized knowledge plus broad technical knowledge that facilitates integrative thinking, driving execution of quality and timely result, capability to solve complex, novel and no-recurring …
工作职责
What you do at AMD changes everything At AMD, we push the boundaries of what is possible. We believe in changing the world for the better by driving innovation in high-performance computing, graphics, and visualization technologies – building blocks for gaming, Immersive platforms, the data center and AI. Developing great technology takes more than talent: it takes amazing people who understand collaboration, respect, and who will go the “extra mile” to achieve unthinkable results. It takes people who have the passion and desire to disrupt the status quo, push boundaries, deliver innovation, and change the world. If you have this type of passion, we invite you to take a look at the opportunities available to come join our team. SOC Design and Verification Engineer THE ROLE: It is a must that the candidate has one or more of the following experience/knowledge, such as X86/ARM/GPU architecture, AMBA(AXI/AHB/APB) bus, LPDDR&GDDR&HBM architecture, PCI-E/PCI bus, low power design, virtualization, display, clock generation and control, SD/eMMC host controller, SATA/SAS, Legacy IPs (SPI/SMBUS/ACPI/LPC/GPIO), General connectivity IPs (I2S/I2C/UART), Ethernet, JTAG, etc.
As an AMD [intern/co-op], you’ll be placed at the epicenter of the AI ecosystem, working alongside experts and industry pioneers. You’ll do important work, learn new skills, expand your network, and gain real-world experience on projects that impact millions of end-users worldwide. Whether you’re an undergrad or a PhD student, your contributions matter—and your experience here will be a launchpad for what comes next. JOB DETAILS: Location: Shanghai Onsite/Hybrid: This role requires the student to work at least 3 days/week Duration: 2026/01 - 2026/06 WHAT YOU WILL BE DOING: We are seeking highly motivated <Role> Engineering intern/co-op to join our team. In this role – 1. Design for Test (DFT) RTL design and coding quality (CDC/LEDA) improvement. 2. Scan insertion, DRC clean, ATPG and pattern simulation 3. Support synthesis owner to fix DFT related netlist issues 4. Work with architect and designer to develop test plan.
1、主导SOC芯片的定义，主导和参与产品关键场景的设计、实现和验证，负责技术体系的搭建； 2、主导SOC软件的需求分析、架构设计和方案分析，输出需求规格，子系统架构、系统分析文档，参与技术评审与决策； 3、洞察行业内软硬件技术驱动，研究软硬件前沿技术，输出领域技术规划，推动软硬件协同设计； 4、主导某一领域的技术发展，包括性能领域、功耗领域、安全领域、低功耗智能领域、DFX领域、套片软件，软件架构、软件工程等领域。
1、负责内存芯片（System Cache、SMMU、DDR）及存储器模块的架构设计、优化和性能提升； 2、负责内存管理以及子系统优化，负责多媒体领域内存管理（包含性能优化、内存容量管理等）和性能优化； 3、负责文件系统、老化等系统分析、设计和优化，提升系统性能； 4、洞察行业内存存储技术，研究软硬件前沿技术，输出领域技术规划，推动软硬件协同设计。
1.负责ISP软件的日常开发工作 2.负责ISP芯片的FPGA，EMU的验证工作 3.负责针对ISP Pipeline的软件结构设计和文档输出 4.负责ISP软件的HAL功能开发 5.负责ISP软件的底层驱动开发 6.负责RTOS的系统软件开发和维护工作