西门子Tessent Staff AE / Tessent Senior AE
任职要求
Siemens EDA is a global technology leader in Electronic Design Automation software. Our software tools enable companies around the world to develop highly innovative electronic products faster and more cost-effectively. Our customers use our tools to push the boundaries of technology and physics to deliver better products in the increasingly complex world of chip, board, and system design.
Key Responsibilities:
• Siemens EDA, seeks a highly motivated individual with the capability and strong desire to make a significant contribution to Tessent business. Tessent is the market and technology leader for silicon life solutions helping customers address their debug, test, yield, safety, security, and optimization requirements for today’s most complex SoCs.
• We are looking for additions to our AE team of Staff AE / Senior AE for the Tessent DFT in Shanghai to support our rapid growth. He / She will be responsible for but not limited to the following:
• Work closely with the customers to address their needs utilizing the Tessent product.
• Deliver and conduct technical presentations, demo and training.
• Provide evaluation and benchmark support, and support initial customer deployment.
• Knowledgeable to identify issues and provide solution; identity bottlenecks and work around; communicate with division for fix / enhancement.
• Establish close relationship with customers to help facilitate achieving sales objectives and to provide ongoing services.
• Support the adoption, proliferation, and successful production deployment of Tessent products in the design.
Qualifications:
• Experienced in digital IC design flows, familiar with DFT/Syntehsis/Formal/STA tools.
• Good knowledge …工作职责
N/A
The candidate is expected to be responsible for following tasks: - Participate in complex Chip DFT/DFD feature and architecture definition - Implement DFT function including SCAN, Boundary SCAN, MBIST, Analog Macro test logic - Generate DFT related timing constraints and work for timing closure - Develop and verify high coverage and cost effective test patterns for the production test - Design, implement and verify other DFX (debug, characterization, yield etc) feature - Evaluate and establish the advanced DFT/DFD tools and flow as DFT CAD
The candidate is expected to be responsible for following tasks: - Participate in complex Chip DFT/DFD feature and architecture definition - Implement DFT function including SCAN, Boundary SCAN, MBIST, Analog Macro test logic - Generate DFT related timing constraints and work for timing closure - Develop and verify high coverage and cost effective test patterns for the production test - Design, implement and verify other DFX (debug, characterization, yield etc) feature - Evaluate and establish the advanced DFT/DFD tools and flow as DFT CAD
The candidate is expected to be responsible for following tasks: - Participate in complex Chip DFT/DFD feature and architecture definition - Implement DFT function including SCAN, Boundary SCAN, MBIST, Analog Macro test logic - Generate DFT related timing constraints and work for timing closure - Develop and verify high coverage and cost effective test patterns for the production test - Design, implement and verify other DFX (debug, characterization, yield etc) feature - Evaluate and establish the advanced DFT/DFD tools and flow as DFT CAD