长江存储工艺整合研发工程师/专家(J13619)

任职要求

1.MS or PhD in Electrical Engineering, Physics, Material or other related technical field is required, or BS +10 years experience in engineering or related discipline 
2.Familiar with semiconductor fabrication process, material, physics, device and concepts. 10+ years of Process Integration and/or Process Development desired 
3.Prior experience in advanced semiconductor fab R&D or production, and new memory technology development is desirable 
4.Good understanding of mainstream memory technologies such as DRAM, NAND, NOR and new memory technologies such as ReRAM, PCM, FeRAM is preferred 
5.Proficient in data analysis, DOE and statistical techniques 
6.Capable of coordinating cross-functional tams to achieve project goal 
7.Strong communication, analysis, reporting/presentation and team building skills

工作职责

1.Be responsible for the design and development of the device architecture of 3D NAND Flash, and deeply participate in the whole process from concept design to mass production. Utilize professional knowledge to carry out innovation at the architecture level, optimize the structure of memory cells, and improve storage density, performance and reliability.
2.Collaborate with the circuit design team to complete the efficient transformation from device physical characteristics to circuit logic, ensuring the compatibility and performance of the overall system. And increase the read and write speed and reduce power consumption.
3.Lead the research and application of new technologies, explore cutting-edge fields such as new materials and manufacturing processes, and provide technical support for the performance breakthrough of 3D NAND Flash. Through the research on industry trends, promote technological innovation and enhance product competitiveness.
4.Conduct in-depth analysis of the problems in the R&D process by using the knowledge of device physics and semiconductor processes, and put forward effective solutions. Use data analysis and modeling techniques to optimize device performance and ensure that products meet high-quality standards.
5.Lead/Participate in test chip tapeout for new memory technology development and product chip tapeout for production introduction 
6.Interact with process module, material, simulation, device characterization and reliability group to optimize process flow, improve memory cell device performance and develop innovative solution to meet product requirement and qualification criteria 
7.	Drive cross-functional team including process module, device, product engineering, design, YE, YAE, TO, and Test to address process/technology gap and yield/margin issues