阿里云阿里云智能-高速光模块硬件技术专家-杭州

1. 研究目前硅光模块中硅光芯片，封装，硬件和高速技术,以及与网卡和交换机接口技术； 2. 结合网卡和交换机设计开发满足需要实际硅光模块需要的硬件设计； 3. 负责硅光芯片和相应封装和整体硬件的评估, 满足光模块研发整体需求； 4. 负责对硅光芯片和相应封装及整体光模块的具体测试等生产流程给出建议和要求； 5. 负责硅光芯片，封装和整体光模块进行失效分析并给出意见。

The candidate will be the major interface to the optical IO analog/mixed signal design team or vendor. As a member of the analog team, you’ll collaborate with our architects and engineers to develop innovative high speed analog transceiver solutions for next-generation optical and wireline communication systems. * We are currently hiring for multiple levels for this role. Your level and compensation will be determined by your experience, education, and location. ● Design analog/mixed-signal blocks with a focus on transceivers and broadband circuits interfacing with silicon photonics elements such as trans-impedance amplifiers (TIA) and Tx Driver ● Contribute to the development of complex SoC integration flows, with a strong focus on high-speed circuit design and advanced node integration. You will work closely with photonics and 3DIC packaging teams to co-develop solutions for leading-edge products ● Support micro-architecture development with chip architects by conducting feasibility studies ● Collaborate with members of our design engineering teams (system, digital, analog, photonics) to define electrical requirements ● Drive block-level floorplan, mask design views, and their reviews ● Run post-layout and mixed-signal top-level simulations to validate integration ● Define production and bench-level test plans ● Validate performances of the circuits in the lab ● Mentor junior design engineers

The candidate will be the major interface to the optical IO analog/mixed signal design team or vendor. As a member of the analog team, you’ll collaborate with our architects and engineers to develop innovative high speed analog transceiver solutions for next-generation optical and wireline communication systems. * We are currently hiring for multiple levels for this role. Your level and compensation will be determined by your experience, education, and location. ● Design analog/mixed-signal blocks with a focus on transceivers and broadband circuits interfacing with silicon photonics elements such as trans-impedance amplifiers (TIA) and Tx Driver ● Contribute to the development of complex SoC integration flows, with a strong focus on high-speed circuit design and advanced node integration. You will work closely with photonics and 3DIC packaging teams to co-develop solutions for leading-edge products ● Support micro-architecture development with chip architects by conducting feasibility studies ● Collaborate with members of our design engineering teams (system, digital, analog, photonics) to define electrical requirements ● Drive block-level floorplan, mask design views, and their reviews ● Run post-layout and mixed-signal top-level simulations to validate integration ● Define production and bench-level test plans ● Validate performances of the circuits in the lab ● Mentor junior design engineers

1. 模型构建与验证：主导Memory IO接口及Clock Path模型的构建与验证，对无源互连通道进行S参数建模、处理与集成分析，输出高精度模型； 2. 系统性能仿真评估：运用信号与系统、数字信号处理、随机过程与概率工具，分析Memory IO接口的时序、抖动、噪声容限和信号完整性，优化无源通道，并对系统性能进行仿真与评估； 3. 自动化仿真流程开发：开发自动化仿真流程，执行大规模蒙特卡洛仿真和工艺角分析，评估系统稳健性并输出分析报告； 4. 跨团队协同与问题解决：与芯片电路设计、信号完整性、封装及硬件团队紧密合作，对齐模型准确性并协同解决设计挑战。