平头哥平头哥-AI芯片SoC设计技术专家-上海
任职要求
* Minimum of 5 years of experience on complex SOC design for proven silicons. * Strong experience on following domain: CPU, GPU, PCIe, Memory, Network. * Experience on one or more of following domain: AXI 4.0(or higher), NOC, Coherency, Virtualization, Security, RAS, …
工作职责
In this role, you will work with software and hardware engineering groups to define the cutting edge of next-generation AI SOC chips for high-performance computing platform in Data Center. * as a design engineer, strong coding skill of system Verilog or Verilog to implement RTL design, develop SOC domain system/interface IP for various SOCs * familiar with ASIC flow to create complex SOCs with advanced methodologies more efficient, participated 3rd party IP integration * strong problem solving and solution for SOC design and IP integration, timing closure, silicon bring up and issue debug * Documents the high-level architecture specification that defines the chip with various sub-systems for the cutting-edge cloud applications. * Works closely with PD, power, system, and verification team to bring up the subsystem
In this role, you will work with software and hardware engineering groups to define the cutting edge of next-generation AI SOC chips for high-performance computing platform in Data Center. * as a design engineer, strong coding skill of system Verilog or Verilog to implement RTL design, develop SOC domain system/interface IP for various SOCs * familiar with ASIC flow to create complex SOCs with advanced methodologies more efficient, participated 3rd party IP integration * strong problem solving and solution for SOC design and IP integration, timing closure, silicon bring up and issue debug * Documents the high-level architecture specification that defines the chip with various sub-systems for the cutting-edge cloud applications. * Works closely with PD, power, system, and verification team to bring up the subsystem
1. 参与SoC系统需求及Spec定义与分析 2. 负责SoC top或Subsystem微架构定义及集成方案，完成RTL代码交付，完成Lint/CDC等质量检查 3. 参与SoC或Subsystem的PPA及时序分析和优化 4. 配合上下游完成芯片验证、后端迭代、底软调试、回片测试等工作
1. 参与高速接口系统(PCIe/UCIe/Ethernet等)需求分析及Spec定义 2. 负责高速接口系统微架构定义及设计方案，并完成RTL交付，完成Lint/CDC等质量检查 3. 负责高速接口系统PPA及时序分析和优化 4. 配合上下游完成芯片验证、后端迭代、底软调试、回片测试等工作
1. 参与多媒体子系统(GPU、ISP、Viedo、Display、DSP等)需求分析及Spec定义 2. 负责多媒体子系统微架构定义及设计方案，并完成RTL交付，完成Lint/CDC等质量检查 3. 负责多媒体子系统PPA及时序分析和优化 4. 配合上下游完成芯片验证、后端迭代、底软调试、回片测试等工作