智能互联平头哥-AI芯片SoC设计技术专家-上海
任职要求
* Minimum of 5 years of experience on complex SOC design for proven silicons. * Strong experience on following domain: CPU, GPU, PCIe, Memory, Network. * Experience on one or more of following domain: AXI 4.0(or higher), NOC, Coherency, Virtualization, Security, RAS, …
工作职责
In this role, you will work with software and hardware engineering groups to define the cutting edge of next-generation AI SOC chips for high-performance computing platform in Data Center. * as a design engineer, strong coding skill of system Verilog or Verilog to implement RTL design, develop SOC domain system/interface IP for various SOCs * familiar with ASIC flow to create complex SOCs with advanced methodologies more efficient, participated 3rd party IP integration * strong problem solving and solution for SOC design and IP integration, timing closure, silicon bring up and issue debug * Documents the high-level architecture specification that defines the chip with various sub-systems for the cutting-edge cloud applications. * Works closely with PD, power, system, and verification team to bring up the subsystem
In this role, you will work with software and hardware engineering groups to define the cutting edge of next-generation AI SOC chips for high-performance computing platform in Data Center. * as a design engineer, strong coding skill of system Verilog or Verilog to implement RTL design, develop SOC domain system/interface IP for various SOCs * familiar with ASIC flow to create complex SOCs with advanced methodologies more efficient, participated 3rd party IP integration * strong problem solving and solution for SOC design and IP integration, timing closure, silicon bring up and issue debug * Documents the high-level architecture specification that defines the chip with various sub-systems for the cutting-edge cloud applications. * Works closely with PD, power, system, and verification team to bring up the subsystem
1. 参与SoC 系统级或子系统级的验证环境搭建、规划系统验证策略或子系统测试用例 2. 编写和调试功能用例、性能用例、功耗用例，参与SoC系统或子系统前仿真、Gate-level后仿真，完成验证覆盖率收集和分析 3. 配合上下游完成芯片EMU、FPGA验证、底软调试及回片测试工作
1、参与人工智能芯片的软硬件协同设计，指令集功能验证； 2、参与人工智能芯片的编译器算法设计和实现, 工具链开发与维护，网络模型的性能调优； 3、参与深度学习软件栈的设计和实现； 1. Working closely with hardware/architecture engineering and software teams to understand the hardware and software requirements. 2. Responsible for compiler and tool chain design, implementation, maintaining and performance tuning. 3. Responsible for the design and implementation of deep learning software stack.
职位描述 1. 负责Soc芯片端到端业务场景测试和验证，包括pre-silicon和post-silicon阶段的验证 2. 能根据端到端业务场景设计有效的测试用例和工具对芯片特性进行验证 3. 开源测试工具的适配和导入 4. 基于产品需求, 进行需求分析, 制定测试方案, 设计测试用例并完成自动化使能 5. 针对测试中出现的缺陷，能够与开发人员沟通，并持续跟踪推进 6. 推动产品高质量交付