平头哥平头哥-AI芯片互联设计专家-上海
任职要求
* Minimum Bachelar degree in Computer Science or Electronics Engineering; M.S. or Ph.D. is preferred * Minimum of 5 years of experience on computer architecture design for proven silicons. Ethernet/Switch/RDMA/RoCE/Ethernet sub-domain is preferred * Strong experience on Ethernet/RDMA/RoCE protocol and architecture design. * Experience on one or more…
工作职责
In this role, you will work with software and hardware engineering groups to define the next-generation inter-chip network architecture for high-performance computing SOC in Data Center Requirement of the Job * Identifies the challenging problems, and evaluate the various solutions for next-generation data center Computing solutions. * Gets strong influences on the shape of future products by advanced architecture design as the excellent interface between software and hardware * Documents the high-level architecture specification that defines the inter-chip network subsystem for the cutting-edge cloud applications. * Works closely with design, system, and verification team to bring up the subsystem
In this role, you will work with software and hardware engineering groups to define the next-generation inter-chip network architecture for high-performance AI chip and AI network. Requirement of the Job * Identifies the challenging problems, and evaluate various solutions for the next-generation of network for AI chip and AI Super Pod. * Gets strong influences on future AI products by advanced architecture design as the excellent interface between software and hardware. * Documents the high-level architecture specification that defines the inter-chip network subsystem for AI chips. * Participation of front-end Implementation of key subsystem. * Strong technical leadership to archive successful delivery of final silicon product. * Works closely with design, system, and verification team.
1、与架构、软件、设计等团队合作构建高端芯片设计验证平台； 2、负责和主导验证方法学和验证策略制定，开发高性能验证架构； 3、负责和主导数据中心芯片互联验证TB开发、环境开发、测试向量开发及调试，覆盖率收集及整体DV signoff的流程开发； 4、负责和主导芯片验证文档的撰写，验证Testbench搭建及实现，Testplan等；
1、与架构、软件、设计等团队合作构建高端芯片设计验证平台； 2、负责和参与data-center inter-chip connections的验证TB开发、环境开发、测试向量开发及调试，覆盖率收集及整体DV signoff的流程开发； 3、负责和参与芯片验证文档的撰写，验证Testbench搭建及实现，Testplan等； 4、负责和参与验证方法学制定，开发高性能验证架构。
1、与架构、软件、设计等团队合作构建高端芯片设计验证平台； 2、负责和参与data-center inter-chip connections的验证TB开发、环境开发、测试向量开发及调试，覆盖率收集及整体DV signoff的流程开发； 3、负责和参与芯片验证文档的撰写，验证Testbench搭建及实现，Testplan等； 4、负责和参与验证方法学制定，开发高性能验证架构。