英伟达Senior System Test Methodology Development Engineer
任职要求
• MS with 8+ years of experience in EE, CE, CS, Systems Engineering, or similar and experience in a related hardware engineering position or equivalent experience. • Rich experience at manufacturing and production testing include boards/tray/rack/cluster levels. • Experience working with GPU/CPU/memory/Highspeed IO/ethernet/router&switcher system features and crafting test strategies. • Familiar with DPPM optimization, test coverage design to meet production requirements and manufacturing strategies for quality/performance/cost optimization. • Understanding of product binning methods, optimization techniques, methods, trade-off analysis and tools for data analysis and statistics. • Background in creating new system tests or test conditions and good skills in Linux, Python, and Perl. • Excellent problem solving, collaborative, and interpersonal skills. Ways to stand out from the crowd: • Familiar with Nvqual, NV Partner Diagnostics, LLM deployment and testing • Familiar with end to end hardware design flow, include SCH/PCB/SI/PI/Power/diagnostics • A "go-getter, can get it done" attitude and independent 'out-of-box' thinking.
工作职责
• Build test methodology, infrastructure and flow to ensure board/tray/rack/cluster level alignment to manufacture specifications that affect yield , cost, performance, reliability&stability, thermal and power. • Craft test strategies for new features, including specifications and validation of test equipment and diagnostic software to bridge gaps between product design targets and manufacturing testability. • Create processes that improves quality/coverage key KPIs (DPPM, failure rate trends, etc) in our production screen flows. • Perform or automate test runs, analyze and visualize data to ensure a high-quality test, and guide debug for yield or escape issues. • Partner with test engineering and operations teams to implementing efficient manufacturable test solutions.
The NVIDIA GPU clocks group is looking for an excellent Senior ASIC Verification engineer to join the team. The Team is responsible for crafting all aspects of GPU clocking. The team collaborates with the frontend design team to understand the clocking requirements for the chip. We also understand the physical restrictions being placed on the clocks by the backend teams. The GPU clocks group architects, designs and validates the clocks RTL. The complexity of clocks RTL has increased many fold to support our features that power our product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. What you’ll be doing: • Develop test plans, tests and verification infrastructure for verifying high-speed Clocking logic, including many aspects: function, DFT, circuit, power, physical design constraints, and etc. You would need to comprehend the functional, test and timing modes for clocks RTL and verify the modes before RTL delivery. • You will collaborate with other verification engineers and provide creative solutions to reuse programming sequences across various verification hierarchies. • Build verification environment using SV/UVM methodology Build reusable bus functional models, monitors, checkers and scoreboards • Drive coverage driven verification closure • Work with architects, designers and post-silicon teams. • Methodology development for above tasks.
Headquartered in Singapore, Ant International powers the future of global commerce with digital innovation for everyone and every business to thrive. In close collaboration with partners, we support merchants of all sizes worldwide to realize their growth aspirations through a comprehensive range of tech-driven digital payment and financial services solutions. We are seeking for Senior and Junior QA Engineers for our Malaysia Tech Center, work on end-to-end solutions for cross-border payments for our global merchants and globalization business. Key Responsibilities: 1. Understand functional and non-functional requirements of software product, design quality assurance and testing strategies for various different products. 2. Contribute to the planning and construction of a product system architecture, assess risks, resolve the design’s testability and address the system stability. 3. Innovate testing tools, testing technologies, testing platform, testing lifecycle of product R&D, improve the testing efficiency. 4. Involved in testing system setup, technology team planning, construction of testing technology platform. 5. Lead and design technology solution and architecture for system integration test, and push solution deployment and implementation. 6. Responsible for the system integration test in product deployment phase of the development lifecycle, ensure product go-live with high quality. 7. Research new technologies and new methods in testing domain, apply and promote them, improve industry influence. 8. To senior candidates, you are expected to lead a team of members and provide internal and external mobile technology workshops, training, and sharing.