AMD芯片设计实习生 ASIC Design Intern (Jan - Jun 2026)
任职要求
Education background in EE/CS Preferred to have one or more of the following design experience/knowledge: 1) Micro-processor (e.g. ARM) architecture and peripheral; 2) Popular on-chip bus (AMBA/AXI) or NOC; 3) low power design and verification methodology; 4) Standard IO IPs, including SPI/SMBUS/GPIO/I2C/I2S/UART; 5) DFT/JTAG, etc, Basic knowledge on synthesis, timing analysis, CDC and formal verification Good communication skill and fluent English #LI-EJ1工作职责
An exciting internship opportunity to make an immediate contribution to AMD's next generation of technology innovations awaits you! We have a multifaceted, high-energy work environment filled with a diverse group of employees, and we provide outstanding opportunities for developing your career. During your internship, our programs provide the opportunity to collaborate with AMD leaders, receive one-on-one mentorship, attend amazing networking events, and much more. Being part of AMD means receiving hands-on experience that will give you a competitive edge. Together We Advance your career! JOB DETAILS: Location: Shanghai Onsite/Hybrid: This role requires the student to work onsite at least 3 days/week throughout internhsip Duration: Jan - Jun 2026 WHAT YOU WILL BE DOING: We are seeking highly motivated Silicon Design Engineer Engineering intern/co-op to join our team. In this role – RTL implementation Collaborate with verification team to achieve good coverage RTL based power, timing and area tracking/analysis
What you do at AMD changes everything At AMD, we push the boundaries of what is possible. We believe in changing the world for the better by driving innovation in high-performance computing, graphics, and visualization technologies – building blocks for gaming, Immersive platforms, the data center and AI. Developing great technology takes more than talent: it takes amazing people who understand collaboration, respect, and who will go the “extra mile” to achieve unthinkable results. It takes people who have the passion and desire to disrupt the status quo, push boundaries, deliver innovation, and change the world. If you have this type of passion, we invite you to take a look at the opportunities available to come join our team. SOC Design and Verification Engineer THE ROLE: It is a must that the candidate has one or more of the following experience/knowledge, such as X86/ARM/GPU architecture, AMBA(AXI/AHB/APB) bus, LPDDR&GDDR&HBM architecture, PCI-E/PCI bus, low power design, virtualization, display, clock generation and control, SD/eMMC host controller, SATA/SAS, Legacy IPs (SPI/SMBUS/ACPI/LPC/GPIO), General connectivity IPs (I2S/I2C/UART), Ethernet, JTAG, etc.
ByteIntern：面向2026届毕业生（2025年9月-2026年8月期间毕业），为符合岗位要求的同学提供转正机会。 团队介绍：字节芯片研发团队隶属于系统部，目前工作主要集中在芯片设计环节。该团队主要围绕字节自身业务展开芯片探索，为字节多项业务的专用场景定制硬件优化，设计多款基于先进半导体工艺的云端复杂芯片，以期提升性能、降低成本。早期若干芯片项目已经进入到量产部署阶段，有多次一版成功的投片经历，所用工艺包含多个主流的先进工艺节点。和系统部基础设施工作的整体协同，能更容易和更好地发挥芯片研发的价值。 1、负责AI芯片设计评估，包括矩阵/卷积计算结构探索、向量计算不同路线量化评估、浮点无损/有损压缩分析、Crossbar结构优化分析等。
ByteIntern：面向2026届毕业生（2025年9月-2026年8月期间毕业），为符合岗位要求的同学提供转正机会。 团队介绍：字节芯片研发团队隶属于系统部，目前工作主要集中在芯片设计环节。该团队主要围绕字节自身业务展开芯片探索，为字节多项业务的专用场景定制硬件优化，设计多款基于先进半导体工艺的云端复杂芯片，以期提升性能、降低成本。早期若干芯片项目已经进入到量产部署阶段，有多次一版成功的投片经历，所用工艺包含多个主流的先进工艺节点。和系统部基础设施工作的整体协同，能更容易和更好地发挥芯片研发的价值。 1、负责AI芯片设计评估，包括矩阵/卷积计算结构探索、向量计算不同路线量化评估、浮点无损/有损压缩分析、Crossbar结构优化分析等。
团队介绍：字节芯片研发团队隶属于系统部，目前工作主要集中在芯片设计环节。该团队主要围绕字节自身业务展开芯片探索，为字节多项业务的专用场景定制硬件优化，设计多款基于先进半导体工艺的云端复杂芯片，以期提升性能、降低成本。早期若干芯片项目已经进入到量产部署阶段，有多次一版成功的投片经历，所用工艺包含多个主流的先进工艺节点。和系统部基础设施工作的整体协同，能更容易和更好地发挥芯片研发的价值。 课题介绍： 探索电路、SoC和算法的协同架构 负责创新架构和系统设计； 与硬件设计团队合作，实现高协同的架构和系统设计。 1、负责各种ASIC/CPU芯片的研发工作，具体内容包括芯片IT CAD、逻辑综合、可测性设计、后端设计、定制IP设计、封装仿真、芯片测试、产品工程等环节； 2、参与芯片项目的规划、立项、评估、执行、验收等相关工作； 3、重点投入到高级封装、高性能IP设计、高性能设计方法学、物理前沿技术等方向。