长鑫存储可靠性验证工程师总监 I RE Director(J15419)
任职要求
任职资格:
1. 研究所硕士及以上学历,电子工程专业或相关专业,可靠性专业,集成电路专业优先;
2. 十年以上集成电路行业可靠性工作经验,熟悉固态技术协标准(JEDECstandard)及可靠性要求;
3. 掌握FMEA、MSA、DOE、5Why等,熟悉研发流程与产品验证流程;
4. 具备团队管理经验,有人才培养及部门规划能力;
5. 有可靠性从业经验者优先。
工作职责
工作职责: 1. 负责新工艺、新产品的可靠性验证及量产产品的监控规划; 2. 研究芯片常见失效模式,开发可靠性测试方法; 3. 参与可靠性研发,IPD 2.0,TDT等研发项目; 4. 对工艺、测试及封装变更进行可靠性评估并提供建议; 5. 进行先进工艺的可靠性风险评估,设计测试结构及方法; 6. 开发与设计相关资料审核; 7. 负责部门预算、人事规划、团队管理及人才培养。
1.内存条可靠性测试(环境和机械)和可靠性问题改进跟踪; 2.SMT良率/SLT良率/DIMM可靠性/系统质量监控; 3.内存条设计的关键参数和PCB布局,SIPI和SLT测试和SMT程序审查; 4.与相关部门合作,优化SMT和DIMM可靠性测试流程; 5.与SMT工程师合作改进SMT工艺问题; 6.内存机械和热模拟; 7.与DIMM可靠性相关的技术/工艺/机器/材料变更评估; 8.客户审核/RMA处理/BLR测试/DIMM ESD测试/ASER测试业务。
芯片产业进入后摩尔时代,芯片封装解决方案面临诸多挑战。封装的尺寸、结构、散热、BOM材料、制造工艺,共同影响芯片的性能、成本、以及应用可靠性。作为封装工程师,你将致力于业界最高端芯片封装解决方案的设计、开发、制造、测试、验证,失效分析以及技术创新。在这里,你可以了解并获得最先进的芯片封装技术知识及能力,并和业界顶尖的工程师一起,共同开发最先进封装技术,并推动其持续发展。 As IC industry enters the more than Moore era, chip packaging solutions are facing many challenges. Package size, package structure, heat dissipation, BOM material, and manufacturing process all affect chip performance, cost, and application reliability. As a packaging engineer, you will be dedicated to the design, development, manufacture, testing, verification, failure analysis, and technological innovation of the industry's highest-end chip packaging solutions. Here, you can understand and acquire the relevant knowledge and skills of the most advanced chip packaging technology, and work with the industry's top engineers to jointly develop the most advanced packaging technology and promote its continuous development. 工作职责RESPONSIBILITIES: 作为可靠性测试验证工程师,负责IC可靠性测试方案的制定与设计,保证芯片可靠性测试验证的顺利开展以支撑芯片及产品的开发及量产应用 Work as a Reliability Test and Verification Engineer, define reliability solution and its corresponding hardware design, to ensure reliability test and verification tasks to support the development and mass production of chips and products. 负责芯片及产品相关的失效分析、可靠性寿命评估,并针对失效分析结果联合上下游团队提出适当的解决方案 Responsible for failure analysis and reliability life assessment to chips and products, and work with up/down-stream teams to propose appropriate solutions based on failure analysis results 构建并不断完善可靠性测试流程、系统,支撑公司产品交付 Build and continuously improve the reliability test process and system to support the company's product delivery 从效率、成本等角度对可靠性测试方法、方案开展持续改进及优化,保证产品测试质量的基础上,不断提升可靠性测试竞争力 Continuous improvement and optimization of reliability test methods and solutions from the perspectives of efficiency and cost, and continuously improve reliability test competitiveness on the basis of ensuring product test quality. 跟踪行业技术趋势,开展可靠性寿命评估模型及方法的研究,应对新工艺制程、新结构、新材料的挑战 Track on the industry trend, perform research on reliability life assessment models and methodology, to addressing challenge on new process, new structure and new material.
芯片产业进入后摩尔时代,芯片封装解决方案面临诸多挑战。封装的尺寸、结构、散热、BOM材料、制造工艺,共同影响芯片的性能、成本、以及应用可靠性。作为封装工程师,你将致力于业界最高端芯片封装解决方案的设计、开发、制造、测试、验证,失效分析以及技术创新。在这里,你可以了解并获得最先进的芯片封装技术知识及能力,并和业界顶尖的工程师一起,共同开发最先进封装技术,并推动其持续发展。 As IC industry enters the more than Moore era, chip packaging solutions are facing many challenges. Package size, package structure, heat dissipation, BOM material, and manufacturing process all affect chip performance, cost, and application reliability. As a packaging engineer, you will be dedicated to the design, development, manufacture, testing, verification, failure analysis, and technological innovation of the industry's highest-end chip packaging solutions. Here, you can understand and acquire the relevant knowledge and skills of the most advanced chip packaging technology, and work with the industry's top engineers to jointly develop the most advanced packaging technology and promote its continuous development. 工作职责RESPONSIBILITIES: 作为可靠性测试验证工程师,负责IC可靠性测试方案的制定与设计,保证芯片可靠性测试验证的顺利开展以支撑芯片及产品的开发及量产应用 Work as a Reliability Test and Verification Engineer, define reliability solution and its corresponding hardware design, to ensure reliability test and verification tasks to support the development and mass production of chips and products. 负责芯片及产品相关的失效分析、可靠性寿命评估,并针对失效分析结果联合上下游团队提出适当的解决方案 Responsible for failure analysis and reliability life assessment to chips and products, and work with up/down-stream teams to propose appropriate solutions based on failure analysis results 构建并不断完善可靠性测试流程、系统,支撑公司产品交付 Build and continuously improve the reliability test process and system to support the company's product delivery 从效率、成本等角度对可靠性测试方法、方案开展持续改进及优化,保证产品测试质量的基础上,不断提升可靠性测试竞争力 Continuous improvement and optimization of reliability test methods and solutions from the perspectives of efficiency and cost, and continuously improve reliability test competitiveness on the basis of ensuring product test quality. 跟踪行业技术趋势,开展可靠性寿命评估模型及方法的研究,应对新工艺制程、新结构、新材料的挑战 Track on the industry trend, perform research on reliability life assessment models and methodology, to addressing challenge on new process, new structure and new material.
芯片产业进入后摩尔时代,芯片封装解决方案面临诸多挑战。封装的尺寸、结构、散热、BOM材料、制造工艺,共同影响芯片的性能、成本、以及应用可靠性。作为封装工程师,你将致力于业界最高端芯片封装解决方案的设计、开发、制造、测试、验证,失效分析以及技术创新。在这里,你可以了解并获得最先进的芯片封装技术知识及能力,并和业界顶尖的工程师一起,共同开发最先进封装技术,并推动其持续发展。 As IC industry enters the more than Moore era, chip packaging solutions are facing many challenges. Package size, package structure, heat dissipation, BOM material, and manufacturing process all affect chip performance, cost, and application reliability. As a packaging engineer, you will be dedicated to the design, development, manufacture, testing, verification, failure analysis, and technological innovation of the industry's highest-end chip packaging solutions. Here, you can understand and acquire the relevant knowledge and skills of the most advanced chip packaging technology, and work with the industry's top engineers to jointly develop the most advanced packaging technology and promote its continuous development. 工作职责RESPONSIBILITIES: 作为可靠性测试验证工程师,负责IC可靠性测试方案的制定与设计,保证芯片可靠性测试验证的顺利开展以支撑芯片及产品的开发及量产应用 Work as a Reliability Test and Verification Engineer, define reliability solution and its corresponding hardware design, to ensure reliability test and verification tasks to support the development and mass production of chips and products. 负责芯片及产品相关的失效分析、可靠性寿命评估,并针对失效分析结果联合上下游团队提出适当的解决方案 Responsible for failure analysis and reliability life assessment to chips and products, and work with up/down-stream teams to propose appropriate solutions based on failure analysis results 构建并不断完善可靠性测试流程、系统,支撑公司产品交付 Build and continuously improve the reliability test process and system to support the company's product delivery 从效率、成本等角度对可靠性测试方法、方案开展持续改进及优化,保证产品测试质量的基础上,不断提升可靠性测试竞争力 Continuous improvement and optimization of reliability test methods and solutions from the perspectives of efficiency and cost, and continuously improve reliability test competitiveness on the basis of ensuring product test quality. 跟踪行业技术趋势,开展可靠性寿命评估模型及方法的研究,应对新工艺制程、新结构、新材料的挑战 Track on the industry trend, perform research on reliability life assessment models and methodology, to addressing challenge on new process, new structure and new material.