平头哥平头哥-芯片可靠性测试验证专家-上海
任职要求
1.材料学、固态电子学、电子相关专业硕士及以上学历
Master degree or above on material science, solid-State Electronics, and electronics related.
2.3年以上可靠性测试验证经验，熟悉可靠性测试验证工作，包括但不限于环境可靠性实验、老化测试实验等，有可靠性验证方案开发、向量开发、老化测试机台调试经验者优先
3+ years’ experience in reliability testing and verification, familiar with reliability testing and verification work, including but not limited to environmental reliability test, aging test, etc., experience in reliability verification program development, vector development, and aging test machine debugging experience is preferred
工作地点：上海，深圳
Work location: Shanghai, Shenzhen工作职责
芯片产业进入后摩尔时代，芯片封装解决方案面临诸多挑战。封装的尺寸、结构、散热、BOM材料、制造工艺，共同影响芯片的性能、成本、以及应用可靠性。作为封装工程师，你将致力于业界最高端芯片封装解决方案的设计、开发、制造、测试、验证，失效分析以及技术创新。在这里，你可以了解并获得最先进的芯片封装技术知识及能力，并和业界顶尖的工程师一起，共同开发最先进封装技术，并推动其持续发展。 As IC industry enters the more than Moore era, chip packaging solutions are facing many challenges. Package size, package structure, heat dissipation, BOM material, and manufacturing process all affect chip performance, cost, and application reliability. As a packaging engineer, you will be dedicated to the design, development, manufacture, testing, verification, failure analysis, and technological innovation of the industry's highest-end chip packaging solutions. Here, you can understand and acquire the relevant knowledge and skills of the most advanced chip packaging technology, and work with the industry's top engineers to jointly develop the most advanced packaging technology and promote its continuous development. 工作职责RESPONSIBILITIES: 作为可靠性测试验证工程师，负责IC可靠性测试方案的制定与设计，保证芯片可靠性测试验证的顺利开展以支撑芯片及产品的开发及量产应用 Work as a Reliability Test and Verification Engineer, define reliability solution and its corresponding hardware design, to ensure reliability test and verification tasks to support the development and mass production of chips and products. 负责芯片及产品相关的失效分析、可靠性寿命评估，并针对失效分析结果联合上下游团队提出适当的解决方案 Responsible for failure analysis and reliability life assessment to chips and products, and work with up/down-stream teams to propose appropriate solutions based on failure analysis results 构建并不断完善可靠性测试流程、系统，支撑公司产品交付 Build and continuously improve the reliability test process and system to support the company's product delivery 从效率、成本等角度对可靠性测试方法、方案开展持续改进及优化，保证产品测试质量的基础上，不断提升可靠性测试竞争力 Continuous improvement and optimization of reliability test methods and solutions from the perspectives of efficiency and cost, and continuously improve reliability test competitiveness on the basis of ensuring product test quality. 跟踪行业技术趋势，开展可靠性寿命评估模型及方法的研究，应对新工艺制程、新结构、新材料的挑战 Track on the industry trend, perform research on reliability life assessment models and methodology, to addressing challenge on new process, new structure and new material.
芯片产业进入后摩尔时代，芯片封装解决方案面临诸多挑战。封装的尺寸、结构、散热、BOM材料、制造工艺，共同影响芯片的性能、成本、以及应用可靠性。作为封装工程师，你将致力于业界最高端芯片封装解决方案的设计、开发、制造、测试、验证，失效分析以及技术创新。在这里，你可以了解并获得最先进的芯片封装技术知识及能力，并和业界顶尖的工程师一起，共同开发最先进封装技术，并推动其持续发展。 As IC industry enters the more than Moore era, chip packaging solutions are facing many challenges. Package size, package structure, heat dissipation, BOM material, and manufacturing process all affect chip performance, cost, and application reliability. As a packaging engineer, you will be dedicated to the design, development, manufacture, testing, verification, failure analysis, and technological innovation of the industry's highest-end chip packaging solutions. Here, you can understand and acquire the relevant knowledge and skills of the most advanced chip packaging technology, and work with the industry's top engineers to jointly develop the most advanced packaging technology and promote its continuous development. 工作职责RESPONSIBILITIES: 作为可靠性测试验证工程师，负责IC可靠性测试方案的制定与设计，保证芯片可靠性测试验证的顺利开展以支撑芯片及产品的开发及量产应用 Work as a Reliability Test and Verification Engineer, define reliability solution and its corresponding hardware design, to ensure reliability test and verification tasks to support the development and mass production of chips and products. 负责芯片及产品相关的失效分析、可靠性寿命评估，并针对失效分析结果联合上下游团队提出适当的解决方案 Responsible for failure analysis and reliability life assessment to chips and products, and work with up/down-stream teams to propose appropriate solutions based on failure analysis results 构建并不断完善可靠性测试流程、系统，支撑公司产品交付 Build and continuously improve the reliability test process and system to support the company's product delivery 从效率、成本等角度对可靠性测试方法、方案开展持续改进及优化，保证产品测试质量的基础上，不断提升可靠性测试竞争力 Continuous improvement and optimization of reliability test methods and solutions from the perspectives of efficiency and cost, and continuously improve reliability test competitiveness on the basis of ensuring product test quality. 跟踪行业技术趋势，开展可靠性寿命评估模型及方法的研究，应对新工艺制程、新结构、新材料的挑战 Track on the industry trend, perform research on reliability life assessment models and methodology, to addressing challenge on new process, new structure and new material.
芯片产业进入后摩尔时代，芯片封装解决方案面临诸多挑战。封装的尺寸、结构、散热、BOM材料、制造工艺，共同影响芯片的性能、成本、以及应用可靠性。作为封装工程师，你将致力于业界最高端芯片封装解决方案的设计、开发、制造、测试、验证，失效分析以及技术创新。在这里，你可以了解并获得最先进的芯片封装技术知识及能力，并和业界顶尖的工程师一起，共同开发最先进封装技术，并推动其持续发展。 As IC industry enters the more than Moore era, chip packaging solutions are facing many challenges. Package size, package structure, heat dissipation, BOM material, and manufacturing process all affect chip performance, cost, and application reliability. As a packaging engineer, you will be dedicated to the design, development, manufacture, testing, verification, failure analysis, and technological innovation of the industry's highest-end chip packaging solutions. Here, you can understand and acquire the relevant knowledge and skills of the most advanced chip packaging technology, and work with the industry's top engineers to jointly develop the most advanced packaging technology and promote its continuous development. 工作职责RESPONSIBILITIES: 作为可靠性测试验证工程师，负责IC可靠性测试方案的制定与设计，保证芯片可靠性测试验证的顺利开展以支撑芯片及产品的开发及量产应用 Work as a Reliability Test and Verification Engineer, define reliability solution and its corresponding hardware design, to ensure reliability test and verification tasks to support the development and mass production of chips and products. 负责芯片及产品相关的失效分析、可靠性寿命评估，并针对失效分析结果联合上下游团队提出适当的解决方案 Responsible for failure analysis and reliability life assessment to chips and products, and work with up/down-stream teams to propose appropriate solutions based on failure analysis results 构建并不断完善可靠性测试流程、系统，支撑公司产品交付 Build and continuously improve the reliability test process and system to support the company's product delivery 从效率、成本等角度对可靠性测试方法、方案开展持续改进及优化，保证产品测试质量的基础上，不断提升可靠性测试竞争力 Continuous improvement and optimization of reliability test methods and solutions from the perspectives of efficiency and cost, and continuously improve reliability test competitiveness on the basis of ensuring product test quality. 跟踪行业技术趋势，开展可靠性寿命评估模型及方法的研究，应对新工艺制程、新结构、新材料的挑战 Track on the industry trend, perform research on reliability life assessment models and methodology, to addressing challenge on new process, new structure and new material.
1.负责具身智能AI感知算力硬件子系统的方案设计和可行性验证， 2.负责具身智能感知传感器选型和可行性验证， 3.负责系统硬件需求拆解，输出硬件设计详细需求和详细设计方案并组织评审 4.负责芯片、模组以及电子元器件选型，评估供应商芯片供应、市场应用、量产时间、成本、交期和demo性能测试验证 5.负责高速数字电路和模拟电路原理图和PCB布局布线设计和评审，具备信号完整性和电源完整性理论和仿真能力，保证硬件性能满足产品要求 6.负责pcba的工厂生产对接，单板硬件bringup调试，信号测量和功能性能调试，信号物理层一致性测试和SI/PI测试 7.负责单板和整机环境温度、EMC辐射传导、震动冲击、盐雾、ip防护、寿命耐久、压力测试等测试要求编写和测试计划规划，解决测试中遇到的硬件和包括软件、结构、热等系统性问题 8.协同造型、软件，算法，结构，热，系统等同事完善硬件设计和组织评审，完成单板和系统在DV/PV测试中问题解决，确保高质量交付 9.负责产线试产量产测试工作，规划产线测试流程和测试要求，如ICT/FCT/ATS/老化等技术规范，配合产线落实测试量产爬坡，解决产线测试不良和量产售后不良问题分析
1.负责具身智能伺服驱动器硬件或ACDC/DCDC电源逆变器子系统的方案设计和可行性验证 2.负责具身智能伺服电机、电源半导体功率器件选型和可行性验证 3.负责系统硬件需求拆解，输出硬件设计详细需求和详细设计方案并组织评审 4.负责芯片、模组以及电子元器件选型，评估供应商芯片供应、市场应用、量产时间、成本、交期和demo性能测试验证 5.负责高速数字电路和模拟电路原理图和PCB布局布线设计和评审，具备信号完整性和电源完整性理论和仿真能力，保证硬件性能满足产品要求 6.负责pcba的工厂生产对接，单板硬件bringup调试，信号测量和功能性能调试，信号物理层一致性测试和SI/PI测试 7.负责单板和整机环境温度、EMC辐射传导、震动冲击、盐雾、ip防护、寿命耐久、压力测试等测试要求编写和测试计划规划，解决测试中遇到的硬件和包括软件、结构、热等系统性问题 8.协同造型、软件，算法，结构，热，系统等同事完善硬件设计和组织评审，完成单板和系统在DV/PV测试中问题解决，确保高质量交付 9.负责产线试产量产测试工作，规划产线测试流程和测试要求，如ICT/FCT/ATS/老化等技术规范，配合产线落实测试量产爬坡，解决产线测试不良和量产售后不良问题分析