长鑫存储Layout Design Engineer(J16586)

任职要求

1. Be familiar with the layout design, physical verification, parameter extraction, etc. of the fully customized design process;
2. Relevant design and verification experience in integrated circuits;
3. Be familiar with EDA tools for fully customized design, including Cadence/Synopsys, StarRC, DRC/LVS;
4. Have 3D layout experience and be proficient in the layout of Wafer on wafer process;
5. Possess excellent learning ability, communication skills and teamwork spirit.

工作职责

1.Complete the layout design based on the schematic diagram of the integrated circuit;
2.Plan the floorplan of the layout, collaborate with circuit design engineers, and optimize the layout to ensure the optimal performance of the circuit;
3. Complete the physical verification of the layout, including DRC, LVS, ERC, etc.