平头哥平头哥-AI芯片架构师-上海

任职要求

* Master's or Ph.D. in Electrical Engineering, Computer Science, or a related field.
* A minimum of 10 years of experience in complex chip design and architecture, with a focus on AI or high-performance computing applications.
* In-depth knowledge of AI algorithms and their computational and memory requirements.
* Familiarity with chip design tools and methodologies, including RTL design using Verilog or VHDL.
* Experience with programming languages such as C/C++ and scripting languages such as Python.
* Strong analytical and problem-solving skills, with the ability to innovate and think creatively.
* Good verbal and written skill for communication.

工作职责

We are seeking a highly skilled and innovative AI Chip Architect who will play a key role in the development of cutting-edge AI hardware. The ideal candidate is a visionary and a problem-solver, capable of designing complex chip architectures optimized for performance, efficiency, and scalability. 
In this role, you will work with software and hardware engineering groups to define state-of-the-art AI chip architecture for high-performance computing system in Data Center.

Key Responsibilities:

* Define the architecture for the next-generation AI chips, including high-performance computing system, hierarchically memory/cache system, and high-speed interconnects.
* Collaborate with a cross-functional team of hardware engineers, software developers, and machine learning specialists to ensure designs meet the performance and power requirements of AI applications.
* Propose and evaluate architectural innovations to improve throughput, latency, energy efficiency, and scalability of AI processing.
* Produce thorough documentation to articulate design decisions and architectural trade-offs to stakeholders.
* Participate in design reviews, providing critical feedback and insights to improve chip quality and performance.
* Oversee and contribute to the entire lifecycle of the chip design process, from specification to production and post-production support.
* Mentor junior engineers and contribute to a culture of technical excellence.