
智能互联平头哥-AI chip performance/power architect-上海
任职要求
Deep understanding of general purpose AI chip architecture; Experience with performance profiling and analysis tools (e.g., NVIDIA Nsight). Familiarity with AI chip programming models (especially for CUDA…
工作职责
Collaborate with the software and hardware team to design and optimize general purpose AI chip architectures. Conduct in-depth performance and power analysis of AI chip workloads. Identify and address performance bottlenecks and power issues in the architecture. Collaborate with the software and hardware teams to optimize AI chip performance and improve power efficiency through micro-architectural and algorithmic improvements. Stay up-to-date with the latest advancements in AI chip technology and performance/power optimization techniques. Conduct research and experiments to explore new performance/power optimization opportunities.
Collaborate with the software and hardware team to design and optimize general purpose AI chip architectures. Conduct in-depth performance and power analysis of AI chip workloads. Identify and address performance bottlenecks and power issues in the architecture. Collaborate with the software and hardware teams to optimize AI chip performance and improve power efficiency through micro-architectural and algorithmic improvements. Stay up-to-date with the latest advancements in AI chip technology and performance/power optimization techniques. Conduct research and experiments to explore new performance/power optimization opportunities.
Collaborate with the software and hardware team to design and optimize general purpose AI chip architectures. Conduct in-depth performance and power analysis of AI chip workloads. Identify and address performance bottlenecks and power issues in the architecture. Collaborate with the software and hardware teams to optimize AI chip performance and improve power efficiency through micro-architectural and algorithmic improvements. Stay up-to-date with the latest advancements in AI chip technology and performance/power optimization techniques. Conduct research and experiments to explore new performance/power optimization opportunities.
We are seeking a highly skilled and innovative AI Chip Architect who will play a key role in the development of cutting-edge AI hardware. The ideal candidate is a visionary and a problem-solver, capable of designing complex chip architectures optimized for performance, efficiency, and scalability. In this role, you will work with software and hardware engineering groups to define state-of-the-art AI chip architecture for high-performance computing system in Data Center. Key Responsibilities: * Define the architecture for the next-generation AI chips, including high-performance computing system, hierarchically memory/cache system, and high-speed interconnects. * Collaborate with a cross-functional team of hardware engineers, software developers, and machine learning specialists to ensure designs meet the performance and power requirements of AI applications. * Propose and evaluate architectural innovations to improve throughput, latency, energy efficiency, and scalability of AI processing. * Produce thorough documentation to articulate design decisions and architectural trade-offs to stakeholders. * Participate in design reviews, providing critical feedback and insights to improve chip quality and performance. * Oversee and contribute to the entire lifecycle of the chip design process, from specification to production and post-production support. * Mentor junior engineers and contribute to a culture of technical excellence.

We are seeking a highly skilled and innovative AI Chip Architect who will play a key role in the development of cutting-edge AI hardware. The ideal candidate is a visionary and a problem-solver, capable of designing complex chip architectures optimized for performance, efficiency, and scalability. In this role, you will work with software and hardware engineering groups to define state-of-the-art AI chip architecture for high-performance computing system in Data Center. Key Responsibilities: * Define the architecture for the next-generation AI chips, including high-performance computing system, hierarchically memory/cache system, and high-speed interconnects. * Collaborate with a cross-functional team of hardware engineers, software developers, and machine learning specialists to ensure designs meet the performance and power requirements of AI applications. * Propose and evaluate architectural innovations to improve throughput, latency, energy efficiency, and scalability of AI processing. * Produce thorough documentation to articulate design decisions and architectural trade-offs to stakeholders. * Participate in design reviews, providing critical feedback and insights to improve chip quality and performance. * Oversee and contribute to the entire lifecycle of the chip design process, from specification to production and post-production support. * Mentor junior engineers and contribute to a culture of technical excellence.